Hi,
If -mdsp option is used then adding -mno-imadd has no effect on the code
generation. This appears to be slightly inconsistent to the -m[no-]imadd option
we have.
Any potential problems/comments? Ok to commit?
Regards,
Robert
gcc/
* config/mips/mips.c (mips_option_override): Move DSP ASE checks
earlier in the function. Enable madd/msub patterns by default
for DSP ASE.
* config/mips/mips.md (<u>msubsidi4): Remove override for DSP.
(<u>maddsidi4): Ditto.
---
gcc/config/mips/mips.c | 30 ++++++++++++++++--------------
gcc/config/mips/mips.md | 4 ++--
2 files changed, 18 insertions(+), 16 deletions(-)
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 4312368..9c6c2a5 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -19758,13 +19758,27 @@ mips_option_override (void)
warning (0, "the %qs architecture does not support branch-likely"
" instructions", mips_arch_info->name);
+ /* If TARGET_DSPR2, enable TARGET_DSP. */
+ if (TARGET_DSPR2)
+ TARGET_DSP = true;
+
+ if (TARGET_DSP && mips_isa_rev >= 6)
+ {
+ error ("the %qs architecture does not support DSP instructions",
+ mips_arch_info->name);
+ TARGET_DSP = false;
+ TARGET_DSPR2 = false;
+ }
+
/* If the user hasn't specified -mimadd or -mno-imadd set
MASK_IMADD based on the target architecture and tuning
flags. */
if ((target_flags_explicit & MASK_IMADD) == 0)
{
- if (ISA_HAS_MADD_MSUB &&
- (mips_tune_info->tune_flags & PTF_AVOID_IMADD) == 0)
+ if ((ISA_HAS_MADD_MSUB &&
+ (mips_tune_info->tune_flags & PTF_AVOID_IMADD) == 0)
+ /* Enable for DSP by default */
+ || TARGET_DSP)
target_flags |= MASK_IMADD;
else
target_flags &= ~MASK_IMADD;
@@ -19955,18 +19969,6 @@ mips_option_override (void)
mips_r10k_cache_barrier = R10K_CACHE_BARRIER_NONE;
}
- /* If TARGET_DSPR2, enable TARGET_DSP. */
- if (TARGET_DSPR2)
- TARGET_DSP = true;
-
- if (TARGET_DSP && mips_isa_rev >= 6)
- {
- error ("the %qs architecture does not support DSP instructions",
- mips_arch_info->name);
- TARGET_DSP = false;
- TARGET_DSPR2 = false;
- }
-
/* .eh_frame addresses should be the same width as a C pointer.
Most MIPS ABIs support only one pointer size, so the assembler
will usually know exactly how big an .eh_frame address is.
diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index 432ab1a..22f4f0b 100644
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -2242,7 +2242,7 @@ (define_insn "<u>msubsidi4"
(mult:DI
(any_extend:DI (match_operand:SI 1 "register_operand" "d"))
(any_extend:DI (match_operand:SI 2 "register_operand" "d")))))]
- "!TARGET_64BIT && (ISA_HAS_MSAC || GENERATE_MADD_MSUB || ISA_HAS_DSP)"
+ "!TARGET_64BIT && (ISA_HAS_MSAC || GENERATE_MADD_MSUB)"
{
if (ISA_HAS_DSP_MULT)
return "msub<u>\t%q0,%1,%2";
@@ -2516,7 +2516,7 @@ (define_insn "<u>maddsidi4"
(mult:DI (any_extend:DI (match_operand:SI 1 "register_operand" "d"))
(any_extend:DI (match_operand:SI 2 "register_operand" "d")))
(match_operand:DI 3 "muldiv_target_operand" "0")))]
- "(TARGET_MAD || ISA_HAS_MACC || GENERATE_MADD_MSUB || ISA_HAS_DSP)
+ "(TARGET_MAD || ISA_HAS_MACC || GENERATE_MADD_MSUB)
&& !TARGET_64BIT"
{
if (TARGET_MAD)
--
2.8.2.396.g5fe494c
