No functional changes.
2016-04-29 Uros Bizjak <ubiz...@gmail.com>
* config/i386/i386.md
(operations with memory inputs setting flags peephole2):
Remove uneeded REG_P checks. Cleanup pattern generation.
Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.
Committed to mainline SVN.
Uros.
Index: i386.md
===================================================================
--- i386.md (revision 235640)
+++ i386.md (working copy)
@@ -18006,16 +18006,18 @@
(GET_CODE (operands[3]) == PLUS
|| GET_CODE (operands[3]) == MINUS)
? CCGOCmode : CCNOmode)"
- [(parallel [(set (match_dup 4) (match_dup 5))
- (set (match_dup 1) (match_op_dup 3 [(match_dup 1)
- (match_dup 2)]))])]
+ [(parallel [(set (match_dup 4) (match_dup 6))
+ (set (match_dup 1) (match_dup 5))])]
{
operands[4] = SET_DEST (PATTERN (peep2_next_insn (3)));
- operands[5] = gen_rtx_fmt_ee (GET_CODE (operands[3]), <MODE>mode,
- copy_rtx (operands[1]),
- copy_rtx (operands[2]));
- operands[5] = gen_rtx_COMPARE (GET_MODE (operands[4]),
- operands[5], const0_rtx);
+ operands[5]
+ = gen_rtx_fmt_ee (GET_CODE (operands[3]), GET_MODE (operands[3]),
+ copy_rtx (operands[1]),
+ operands[2]);
+ operands[6]
+ = gen_rtx_COMPARE (GET_MODE (operands[4]),
+ copy_rtx (operands[5]),
+ const0_rtx);
})
;; Likewise for instances where we have a lea pattern.
@@ -18038,16 +18040,18 @@
|| immediate_operand (operands[2], QImode)
|| any_QIreg_operand (operands[2], QImode))
&& ix86_match_ccmode (peep2_next_insn (3), CCGOCmode)"
- [(parallel [(set (match_dup 4) (match_dup 5))
- (set (match_dup 1) (plus:SWI (match_dup 1)
- (match_dup 2)))])]
+ [(parallel [(set (match_dup 4) (match_dup 6))
+ (set (match_dup 1) (match_dup 5))])]
{
operands[4] = SET_DEST (PATTERN (peep2_next_insn (3)));
- operands[5] = gen_rtx_PLUS (<MODE>mode,
- copy_rtx (operands[1]),
- copy_rtx (operands[2]));
- operands[5] = gen_rtx_COMPARE (GET_MODE (operands[4]),
- operands[5], const0_rtx);
+ operands[5]
+ = gen_rtx_PLUS (<MODE>mode,
+ copy_rtx (operands[1]),
+ operands[2]);
+ operands[6]
+ = gen_rtx_COMPARE (GET_MODE (operands[4]),
+ copy_rtx (operands[5]),
+ const0_rtx);
})
(define_peephole2
@@ -18065,16 +18069,18 @@
&& ix86_match_ccmode (peep2_next_insn (2),
GET_CODE (operands[2]) == PLUS
? CCGOCmode : CCNOmode)"
- [(parallel [(set (match_dup 3) (match_dup 4))
- (set (match_dup 1) (match_op_dup 2 [(match_dup 1)
- (match_dup 0)]))])]
+ [(parallel [(set (match_dup 3) (match_dup 5))
+ (set (match_dup 1) (match_dup 4))])]
{
operands[3] = SET_DEST (PATTERN (peep2_next_insn (2)));
- operands[4] = gen_rtx_fmt_ee (GET_CODE (operands[2]), <MODE>mode,
- copy_rtx (operands[1]),
- copy_rtx (operands[0]));
- operands[4] = gen_rtx_COMPARE (GET_MODE (operands[3]),
- operands[4], const0_rtx);
+ operands[4]
+ = gen_rtx_fmt_ee (GET_CODE (operands[2]), GET_MODE (operands[2]),
+ copy_rtx (operands[1]),
+ operands[0]);
+ operands[5]
+ = gen_rtx_COMPARE (GET_MODE (operands[3]),
+ copy_rtx (operands[4]),
+ const0_rtx);
})
(define_peephole2
@@ -18088,7 +18094,6 @@
(set (match_dup 1) (match_dup 0))
(set (reg FLAGS_REG) (compare (match_dup 0) (const_int 0)))]
"(TARGET_READ_MODIFY_WRITE || optimize_insn_for_size_p ())
- && REG_P (operands[0]) && REG_P (operands[4])
&& REGNO (operands[0]) == REGNO (operands[4])
&& peep2_reg_dead_p (4, operands[0])
&& (<MODE>mode != QImode
@@ -18100,18 +18105,18 @@
(GET_CODE (operands[3]) == PLUS
|| GET_CODE (operands[3]) == MINUS)
? CCGOCmode : CCNOmode)"
- [(parallel [(set (match_dup 4) (match_dup 5))
- (set (match_dup 1) (match_dup 6))])]
+ [(parallel [(set (match_dup 4) (match_dup 6))
+ (set (match_dup 1) (match_dup 5))])]
{
- operands[2] = gen_lowpart (<MODE>mode, operands[2]);
operands[4] = SET_DEST (PATTERN (peep2_next_insn (3)));
- operands[5] = gen_rtx_fmt_ee (GET_CODE (operands[3]), <MODE>mode,
- copy_rtx (operands[1]), operands[2]);
- operands[5] = gen_rtx_COMPARE (GET_MODE (operands[4]),
- operands[5], const0_rtx);
- operands[6] = gen_rtx_fmt_ee (GET_CODE (operands[3]), <MODE>mode,
- copy_rtx (operands[1]),
- copy_rtx (operands[2]));
+ operands[5]
+ = gen_rtx_fmt_ee (GET_CODE (operands[3]), <MODE>mode,
+ copy_rtx (operands[1]),
+ gen_lowpart (<MODE>mode, operands[2]));
+ operands[6]
+ = gen_rtx_COMPARE (GET_MODE (operands[4]),
+ copy_rtx (operands[5]),
+ const0_rtx);
})
;; Attempt to always use XOR for zeroing registers (including FP modes).
