Hello!
2016-04-29 Uros Bizjak <ubiz...@gmail.com>
* config/i386/i386.md (Load+RegOp to Mov+MemOp peephole2):
Use SWI mode iterator. Use general_reg_operand predicate.
(Load+RegOp to Mov+MemOp peephole2 with vector regs): Split
peephole to MMX and SSE part. Use mmx_reg_operand and sse_reg_operand
predicates.
Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.
Committed to mainline SVN.
Uros.
Index: i386.md
===================================================================
--- i386.md (revision 235619)
+++ i386.md (working copy)
@@ -17905,20 +17905,20 @@
(match_op_dup 3 [(match_dup 2) (match_dup 0)]))
(clobber (reg:CC FLAGS_REG))])])
-;; Prefer Load+RegOp to Mov+MemOp. Watch out for cases when the memory address
-;; refers to the destination of the load!
+;; Prefer Load+RegOp to Mov+MemOp. Watch out for cases when
+;; the memory address refers to the destination of the load!
(define_peephole2
- [(set (match_operand:SI 0 "register_operand")
- (match_operand:SI 1 "register_operand"))
+ [(set (match_operand:SWI 0 "general_reg_operand")
+ (match_operand:SWI 1 "general_reg_operand"))
(parallel [(set (match_dup 0)
- (match_operator:SI 3 "commutative_operator"
+ (match_operator:SWI 3 "commutative_operator"
[(match_dup 0)
- (match_operand:SI 2 "memory_operand")]))
+ (match_operand:SWI 2 "memory_operand")]))
(clobber (reg:CC FLAGS_REG))])]
"REGNO (operands[0]) != REGNO (operands[1])
- && GENERAL_REGNO_P (REGNO (operands[0]))
- && GENERAL_REGNO_P (REGNO (operands[1]))"
+ && (<MODE>mode != QImode
+ || any_QIreg_operand (operands[1], QImode))"
[(set (match_dup 0) (match_dup 4))
(parallel [(set (match_dup 0)
(match_op_dup 3 [(match_dup 0) (match_dup 1)]))
@@ -17926,21 +17926,29 @@
"operands[4] = replace_rtx (operands[2], operands[0], operands[1], true);")
(define_peephole2
- [(set (match_operand 0 "register_operand")
- (match_operand 1 "register_operand"))
+ [(set (match_operand 0 "mmx_reg_operand")
+ (match_operand 1 "mmx_reg_operand"))
(set (match_dup 0)
(match_operator 3 "commutative_operator"
[(match_dup 0)
(match_operand 2 "memory_operand")]))]
- "REGNO (operands[0]) != REGNO (operands[1])
- && ((MMX_REGNO_P (REGNO (operands[0]))
- && MMX_REGNO_P (REGNO (operands[1])))
- || (SSE_REGNO_P (REGNO (operands[0]))
- && SSE_REGNO_P (REGNO (operands[1]))))"
+ "REGNO (operands[0]) != REGNO (operands[1])"
[(set (match_dup 0) (match_dup 2))
(set (match_dup 0)
(match_op_dup 3 [(match_dup 0) (match_dup 1)]))])
+(define_peephole2
+ [(set (match_operand 0 "sse_reg_operand")
+ (match_operand 1 "sse_reg_operand"))
+ (set (match_dup 0)
+ (match_operator 3 "commutative_operator"
+ [(match_dup 0)
+ (match_operand 2 "memory_operand")]))]
+ "REGNO (operands[0]) != REGNO (operands[1])"
+ [(set (match_dup 0) (match_dup 2))
+ (set (match_dup 0)
+ (match_op_dup 3 [(match_dup 0) (match_dup 1)]))])
+
; Don't do logical operations with memory outputs
;
; These two don't make sense for PPro/PII -- we're expanding a 4-uop
