Hi, This series of 6 patches are fixing a number of small issues found during time with our compiler.
Patch 1 fixes the problem of using drsub* instructions when compiling with double assist instruction support. Patch 2 fixes big-endian emitted code when using FPX extension instructions. Patch 3 passes mfpuda option to the compiler whenever we use double assist instructions in or compilation. Patch 4 fixes the floating point optimized equality routine to handle NaNs emitted by FPX extenssion. Patch 5 fixes the case when combiner matches a sign-extended 16-bit number with umulhisi3_imm pattern. Patch 6 fixes various instruction patterns. OK to apply? Claudiu Claudiu Zissulescu (6): [ARC] Don't use drsub* instructions when selecting fpuda. [ARC] Fix FPX/FPUDA code gen when compiling for big-endian. [ARC] Pass mfpuda to assembler. [ARC] Handle FPX NaN within optimized floating point library. [ARC] Fix unwanted match for sign extend 16-bit constant. [ARC] Various instruction pattern fixes gcc/config/arc/arc.c | 12 ++- gcc/config/arc/arc.h | 2 +- gcc/config/arc/arc.md | 154 ++++++++++++++++------------- gcc/config/arc/fpx.md | 7 +- gcc/testsuite/gcc.target/arc/ieee_eq.c | 47 +++++++++ gcc/testsuite/gcc.target/arc/trsub.c | 10 ++ gcc/testsuite/gcc.target/arc/umulsihi3_z.c | 23 +++++ libgcc/config/arc/ieee-754/eqdf2.S | 13 ++- 8 files changed, 186 insertions(+), 82 deletions(-) create mode 100644 gcc/testsuite/gcc.target/arc/ieee_eq.c create mode 100644 gcc/testsuite/gcc.target/arc/trsub.c create mode 100644 gcc/testsuite/gcc.target/arc/umulsihi3_z.c -- 1.9.1
