When adding the basic __float128 support, I forgot to enable direct move
support for moving __float128 between VSX registers and GPR registers.
This patch enables using direct move for __float128 variables on Power8
systems. I bootstrapped the compiler and found no regressions with this
patch. Is it ok to apply to the GCC trunk?
[gcc]
2016-04-14 Michael Meissner <meiss...@linux.vnet.ibm.com>
PR target/70669
* config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Add
direct move handlers for KFmode. Change TFmode handlers test from
FLOAT128_IEEE_P to FLOAT128_VECTOR_P.
[gcc/testsuite]
2016-04-14 Michael Meissner <meiss...@linux.vnet.ibm.com>
PR target/70669
* gcc.target/powerpc/pr70669.c: New test.
--
Michael Meissner, IBM
IBM, M/S 2506R, 550 King Street, Littleton, MA 01460-6245, USA
email: meiss...@linux.vnet.ibm.com, phone: +1 (978) 899-4797
Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc/config/rs6000/rs6000.c (revision 234910)
+++ gcc/config/rs6000/rs6000.c (working copy)
@@ -3132,8 +3132,6 @@ rs6000_init_hard_regno_mode_ok (bool glo
reg_addr[V4SFmode].reload_load = CODE_FOR_reload_v4sf_di_load;
reg_addr[V2DFmode].reload_store = CODE_FOR_reload_v2df_di_store;
reg_addr[V2DFmode].reload_load = CODE_FOR_reload_v2df_di_load;
- reg_addr[KFmode].reload_store = CODE_FOR_reload_kf_di_store;
- reg_addr[KFmode].reload_load = CODE_FOR_reload_kf_di_load;
reg_addr[DFmode].reload_store = CODE_FOR_reload_df_di_store;
reg_addr[DFmode].reload_load = CODE_FOR_reload_df_di_load;
reg_addr[DDmode].reload_store = CODE_FOR_reload_dd_di_store;
@@ -3141,7 +3139,13 @@ rs6000_init_hard_regno_mode_ok (bool glo
reg_addr[SFmode].reload_store = CODE_FOR_reload_sf_di_store;
reg_addr[SFmode].reload_load = CODE_FOR_reload_sf_di_load;
- if (FLOAT128_IEEE_P (TFmode))
+ if (FLOAT128_VECTOR_P (KFmode))
+ {
+ reg_addr[KFmode].reload_store = CODE_FOR_reload_kf_di_store;
+ reg_addr[KFmode].reload_load = CODE_FOR_reload_kf_di_load;
+ }
+
+ if (FLOAT128_VECTOR_P (TFmode))
{
reg_addr[TFmode].reload_store = CODE_FOR_reload_tf_di_store;
reg_addr[TFmode].reload_load = CODE_FOR_reload_tf_di_load;
@@ -3182,6 +3186,18 @@ rs6000_init_hard_regno_mode_ok (bool glo
reg_addr[V8HImode].reload_vsx_gpr =
CODE_FOR_reload_vsx_from_gprv8hi;
reg_addr[V16QImode].reload_vsx_gpr =
CODE_FOR_reload_vsx_from_gprv16qi;
reg_addr[SFmode].reload_vsx_gpr =
CODE_FOR_reload_vsx_from_gprsf;
+
+ if (FLOAT128_VECTOR_P (KFmode))
+ {
+ reg_addr[KFmode].reload_gpr_vsx =
CODE_FOR_reload_gpr_from_vsxkf;
+ reg_addr[KFmode].reload_vsx_gpr =
CODE_FOR_reload_vsx_from_gprkf;
+ }
+
+ if (FLOAT128_VECTOR_P (TFmode))
+ {
+ reg_addr[TFmode].reload_gpr_vsx =
CODE_FOR_reload_gpr_from_vsxtf;
+ reg_addr[TFmode].reload_vsx_gpr =
CODE_FOR_reload_vsx_from_gprtf;
+ }
}
}
else
@@ -3200,8 +3216,6 @@ rs6000_init_hard_regno_mode_ok (bool glo
reg_addr[V4SFmode].reload_load = CODE_FOR_reload_v4sf_si_load;
reg_addr[V2DFmode].reload_store = CODE_FOR_reload_v2df_si_store;
reg_addr[V2DFmode].reload_load = CODE_FOR_reload_v2df_si_load;
- reg_addr[KFmode].reload_store = CODE_FOR_reload_kf_si_store;
- reg_addr[KFmode].reload_load = CODE_FOR_reload_kf_si_load;
reg_addr[DFmode].reload_store = CODE_FOR_reload_df_si_store;
reg_addr[DFmode].reload_load = CODE_FOR_reload_df_si_load;
reg_addr[DDmode].reload_store = CODE_FOR_reload_dd_si_store;
@@ -3209,6 +3223,12 @@ rs6000_init_hard_regno_mode_ok (bool glo
reg_addr[SFmode].reload_store = CODE_FOR_reload_sf_si_store;
reg_addr[SFmode].reload_load = CODE_FOR_reload_sf_si_load;
+ if (FLOAT128_VECTOR_P (KFmode))
+ {
+ reg_addr[KFmode].reload_store = CODE_FOR_reload_kf_si_store;
+ reg_addr[KFmode].reload_load = CODE_FOR_reload_kf_si_load;
+ }
+
if (FLOAT128_IEEE_P (TFmode))
{
reg_addr[TFmode].reload_store = CODE_FOR_reload_tf_si_store;
Index: gcc/testsuite/gcc.target/powerpc/pr70669.c
===================================================================
--- gcc/testsuite/gcc.target/powerpc/pr70669.c (revision 0)
+++ gcc/testsuite/gcc.target/powerpc/pr70669.c (working copy)
@@ -0,0 +1,22 @@
+/* { dg-do compile { target { powerpc*-*-linux* && lp64 } } } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } {
"-mcpu=power8" } } */
+/* { dg-options "-O2 -mcpu=power8 -mfloat128" } */
+
+#ifndef TYPE
+#define TYPE __float128
+#endif
+
+void foo (TYPE *p, TYPE *q)
+{
+ TYPE r = *q;
+#ifndef NO_ASM
+ __asm__ (" # %0" : "+r" (r));
+#endif
+ *p = r;
+}
+
+/* { dg-final { scan-assembler "mfvsrd" } } */
+/* { dg-final { scan-assembler "mtvsrd" } } */
+/* { dg-final { scan-assembler-times "stxvd2x" 1 } } */
+/* { dg-final { scan-assembler-times "lxvd2x" 1 } } */
