Richard Biener <richard.guent...@gmail.com> writes: > On Thu, Feb 4, 2016 at 12:09 PM, Eric Botcazou <ebotca...@adacore.com> wrote: >>> So this doesn’t fix aarch64, c6x, epiphany, ia64, iq2000, rs6000, rx, sparc, >>> tilegx, tilepro or xtensa. >>> :-( That’s one of the problems by having each port copy and paste swaths of >>> :code from other ports to express the same thing instead of ports sharing >>> :just one copy of code. My port is also broken in the same way >>> :(currently). >> >> Yes, fixing a compiler bug by changing the ABI is a no-no, and the argument >> of >> the compatibility with LLVM has IMO little merit since it's a GCC extension. > > True, but the compiler bug is in the backends - it just now gets > exposed more easily > (read: w/o user intervention).
I'm still not convinced it's a backend/target bug though. It seems like a similar situation to floats being promoted to doubles and chars to ints when passed to unprototyped functions or varargs. In those situations it's up to the hook to decide what type the value actually gets passed as. Passing an overaligned int as a plain int is pretty similar and isn't something that each target should need to check individually. Thanks, Richard
