On Thu, Jan 07, 2016 at 03:39:42PM +0000, Kyrill Tkachov wrote: > Hi all, > > This is an aarch64-specific approach to fixing the issue I raised in the > thread at: > https://gcc.gnu.org/ml/gcc-patches/2015-12/msg01779.html > > The guidance there was to define aarch64 patterns for comparing QImode and > HImode registers > against zero. This is a simple pattern to write and it maps down to a TST > instruction > with the mode mask immediate for each of the short modes. > > On aarch64 it has the exact same codegen effect as the combine patch I > proposed in the > thread above. For example: > > With this patch for the testcases: > int > f255 (int x) > { > if (x & 255) > return 1; > return x; > } > > int > foo (long x) > { > return ((short) x != 0) ? x : 1; > } > > we now generate for aarch64 at -O2: > f255: > tst x0, 255 > csinc w0, w0, wzr, eq > ret > > and > foo: > tst x0, 65535 > csinc x0, x0, xzr, ne > ret > > > instead of the previous: > f255: > and w1, w0, 255 > cmp w1, wzr > csinc w0, w0, wzr, eq > ret > > foo: > sxth w1, w0 > cmp w1, wzr > csinc x0, x0, xzr, ne > ret > > > Bootstrapped and tested on aarch64-none-linux-gnu. > Ok for trunk?
OK. Thanks, James > 2016-01-07 Kyrylo Tkachov <kyrylo.tkac...@arm.com> > > PR rtl-optimization/68796 > * config/aarch64/aarch64.md (*and<mode>_compare0): New pattern. > * config/aarch64/aarch64.c (aarch64_select_cc_mode): Handle HImode > and QImode comparisons against zero with CC_NZmode. > * config/aarch64/iterators.md (short_mask): New mode_attr. > > 2016-01-07 Kyrylo Tkachov <kyrylo.tkac...@arm.com> > > PR rtl-optimization/68796 > * gcc.target/aarch64/tst_5.c: New test. > * gcc.target/aarch64/tst_6.c: Likewise.
