[PATCH] Fix pr68917 ICE on __builtin_clz for tilegx

[Bernd Edlinger]

Hi,


due to more thorough checks in the middle end the builtin clz instruction
causes now an ICE on the tilegx target.

I have built a tilegx-cross-comiler and inspected the generated code
to verify that the patch works.


Is is OK for trunk?


Thanks
Bernd.
2015-12-27  Bernd Edlinger  <bernd.edlin...@hotmail.de>

        PR target/68917
        * config/tilegx/tilegx.md (clzsi2): Don't create DI subregs of
        SI values.  Explicitly convert SI to DI and vice-versa.

Index: gcc/config/tilegx/tilegx.md
===================================================================
--- gcc/config/tilegx/tilegx.md	(revision 231954)
+++ gcc/config/tilegx/tilegx.md	(working copy)
@@ -1799,13 +1799,16 @@
 
 (define_expand "clzsi2"
   [(set (match_dup 2)
-        (ashift:DI (match_operand:SI 1 "reg_or_0_operand" "")
+	(zero_extend:DI (match_operand:SI 1 "reg_or_0_operand" "")))
+   (set (match_dup 2)
+	(ashift:DI (match_dup 2)
                    (const_int 32)))
-   (set (subreg:DI (match_operand:SI 0 "register_operand" "") 0)
-	(clz:DI (match_dup 2)))]
+   (set (match_dup 2)
+	(clz:DI (match_dup 2)))
+   (set (match_operand:SI 0 "register_operand" "")
+	(subreg:SI (match_dup 2) 0))]
    ""
    {
-     operands[1] = simplify_gen_subreg (DImode, operands[1], SImode, 0);
      operands[2] = gen_reg_rtx (DImode);
    })