Hi all,
This converts the preprocessor check for WORD_REGISTER_OPERATIONS into a
runtime check
in reload1.c.
Since this one is used to guard part of a condition, I'd appreciate it if
someone
double-checks that the logic is still equivalent.
Bootstrapped and tested on arm, aarch64, x86_64.
Ok for trunk?
Thanks,
Kyrill
2015-12-15 Kyrylo Tkachov <kyrylo.tkac...@arm.com>
* reload1.c (eliminate_regs_1): Convert preprocessor check
for WORD_REGISTER_OPERATIONS to runtime check.
diff --git a/gcc/reload1.c b/gcc/reload1.c
index 4f1910b95cae33418e7bf3f1e19a564b1e43614d..1a1a591b3777fa2a0a4a12fe0b2d763acee453ad 100644
--- a/gcc/reload1.c
+++ b/gcc/reload1.c
@@ -2851,20 +2851,17 @@ eliminate_regs_1 (rtx x, machine_mode mem_mode, rtx insn,
if (MEM_P (new_rtx)
&& ((x_size < new_size
-#if WORD_REGISTER_OPERATIONS
- /* On these machines, combine can create rtl of the form
- (set (subreg:m1 (reg:m2 R) 0) ...)
- where m1 < m2, and expects something interesting to
- happen to the entire word. Moreover, it will use the
- (reg:m2 R) later, expecting all bits to be preserved.
- So if the number of words is the same, preserve the
- subreg so that push_reload can see it. */
- && ! ((x_size - 1) / UNITS_PER_WORD
- == (new_size -1 ) / UNITS_PER_WORD)
-#endif
- )
- || x_size == new_size)
- )
+ /* On machines with WORD_REGISTER_OPERATIONS, combine can create
+ rtl of the form (set (subreg:m1 (reg:m2 R) 0) ...)
+ where m1 < m2, and expects something interesting to
+ happen to the entire word. Moreover, it will use the
+ (reg:m2 R) later, expecting all bits to be preserved.
+ So if the number of words is the same, preserve the
+ subreg so that push_reload can see it. */
+ && !(WORD_REGISTER_OPERATIONS
+ && ((x_size - 1) / UNITS_PER_WORD
+ == (new_size - 1) / UNITS_PER_WORD)))
+ || x_size == new_size))
return adjust_address_nv (new_rtx, GET_MODE (x), SUBREG_BYTE (x));
else
return gen_rtx_SUBREG (GET_MODE (x), new_rtx, SUBREG_BYTE (x));
