On 08/08/2011 05:16 PM, Uros Bizjak wrote:
BTW: There is a strange optimization in combine pass, where zero-extended address is converted on-the-fly to:Trying 9 -> 10: Failed to match this instruction: (... (and:DI (subreg:DI (plus:SI (ashift:SI (reg/v:SI 63 [ i ]) (const_int 2 [0x2])) (subreg:SI (reg/v/f:DI 62 [ a ]) 0)) 0) (const_int 4294967295 [0xffffffff])) ...) While it is easy to add a pattern recognizer for this RTX to ix86_decompose_address/ix86_legitimate_address_p, I would like to understand the purpose of the conversion better and eventually fix it in combine pass.
Combine tries to expand and recreate extend and extract operations, hoping to merge it with other bitwise operations.
Paolo
