> My case comes from the gcc.dg/pr65492-2.c, the "test1int2" case. > combine has made an insn > modifying insn i3 21: zero_extract(%3:DI,0x20,0)=%3:DI > which is splatting the SImode parameter to both the high and low halves > of the dest reg. Then, it tries to combine it with the USE of that reg > at the end of the function, giving > > Failed to match this instruction: > (parallel [ > (use (ior:DI (and:DI (reg/i:DI 3 3) > (const_int 4294967295 [0xffffffff])) > (ashift:DI (reg:DI 3 3 [ c ]) > (const_int 32 [0x20])))) > (set (zero_extract:DI (reg/i:DI 3 3) > (const_int 32 [0x20]) > (const_int 0 [0])) > (reg:DI 3 3 [ c ])) > ]) > > and if it has a parallel of two which doesn't match, it sees if it > just needs one arm because the other is a noop set, and that ends > up with > deleting noop move 21 > because of the wrong test, making the testcase fail. > (powerpc64le has BITS_BIG_ENDIAN set, a bit unusual).
Thanks. It seems a little odd for the condition to test the POS (operand #2) and not also the LEN (operand #1) of the ZERO_EXTRACT before returning true, but I'm not sure what the test would be given the above example. Or maybe it's implicitly contained in the POS test because of the little-endian case. The patch is OK for mainline. -- Eric Botcazou
