On 4 December 2015 at 19:42, James Greenhalgh <james.greenha...@arm.com> wrote:
>
> Hi,
>
> This patch fixes a bug I spotted in the add<mode>3_pluslong insn_and_split
> pattern. We need to give register constraints, otherwise the register
> allocator can do whatever it likes. This manifests as an ICE on AArch64
> with -mabi=ilp32:
>
> gcc foo.c -O2 -mabi=ilp32
>
> error: could not split insn
> }
> ^
>
> (insn:TI 85 95 7 (set (mem/c:DI (plus:DI (reg/f:DI 29 x29)
> (const_int 40 [0x28])) [1 %sfp+-65528 S8 A64])
> (plus:DI (plus:DI (reg/f:DI 29 x29)
> (const_int 16 [0x10]))
> (const_int 65552 [0x10010]))) foo.c:7 95 {*adddi3_pluslong}
> (nil))
>
> The patch simply constrains the pattern to use w/x registers.
>
> Bootstrapped on aarch64-none-linux-gnu and cross-tested on aarch64-none-elf
> with no issues.
>
> OK?
>
> Thanks,
> James
>
> ---
> gcc/
>
> 2015-12-04 James Greenhalgh <james.greenha...@arm.com>
>
> * config/aarch64/aarch64.md (add<mode>3_pluslong): Add register
> constraints.
>
> gcc/testsuite/
>
> 2015-12-04 James Greenhalgh <james.greenha...@arm.com>
>
> * gcc.c-torture/compile/20151204.c: New.
>
+main(int argc, char** argv)
Space before (.
OK
/M
