> Some ISAs have instructions to perform a bitwise AND operation with an > immediate and compare the result with zero.
Many of them I'd say. > Is there a good way to fix this? It would seem rather weird to have extra MD > patterns to match the zero_extract forms explicitly. Maybe teaching the > aarch64 implementation of SELECT_CC_MODE to handle ZERO_EXTRACTS the same > as AND-immediates? Or is there something that can be done in combine > itself? ARM, i386, MIPS, PA, SPARC, etc have ZERO_EXTRACT-based patterns though. -- Eric Botcazou
