On Fri, Nov 13, 2015 at 11:13 AM, James Greenhalgh
<james.greenha...@arm.com> wrote:
>
> Hi,
>
> With all the work that has recently gone in to ifcvt, I thought I'd revisit
> the branch cost settings for Cortex-A57. After a run of experiments [1],
> I found {1, 3} to be the sweet spot, giving a small set of performance
> improvements across some popular benchmarks.
>
> I'd therefore like to propose changing the branch cost to those numbers.
>
> Patch bootstrapped tuning for Cortex-A57 with no issues. I'll revisit
> the same for Cortex-A53.
>
> OK?
Can you re-do the experiment with adding a LOGICAL_OP_NON_SHORT_CIRCUIT
target macro for aarch64? It's fallback uses BRANCH_COST (see fold-const.c
and tree-ssa-ifcombine.c)
Richard.
>
> Thanks,
> James
>
> [1]: {2, 2}, {2, 3}, {2, 4},
> {1, 2}, {1, 3}, {1, 4},
> {3, 3}, {3, 4},
> {4, 4}, {4, 5},
> {5, 5}, {5, 6}
>
> ---
> 2015-11-12 James Greenhalgh <james.greenha...@arm.com>
>
> * config/aarch64/aarch64.c (cortexa57_branch_costs): New.
> (cortexa57_tunings): Use it.
>
