On Sun, Nov 8, 2015 at 7:44 PM, Michael Meissner
<meiss...@linux.vnet.ibm.com> wrote:
> This patch adds support for the IEEE 128-bit hardware instructions that are
> being added to the PowerPC ISA 3.0 (power9).  With this patch, users on power7
> and power8 will use the software emulation functions that are committed, but
> still need some enhancment.  On ISA 3.0/power9, they would be able to use the
> direct instructions.
>
> I have built this patch with a bootstrap build on a power8 little endian
> system.  There were no regressions in the test suite.  Is this patch ok to
> install in the trunk?
>
> [gcc]
> 2015-11-08  Michael Meissner  <meiss...@linux.vnet.ibm.com>
>
>         * config/rs6000/rs6000-protos.h (convert_float128_to_int): Add
>         declaration.
>         (convert_int_to_float128): Likewise.
>         (rs6000_generate_compare): Add support for ISA 3.0 (power9)
>         hardware support for IEEE 128-bit floating point.
>         (rs6000_expand_float128_convert): Likewise.
>         (convert_float128_to_int): Likewise.
>         (convert_int_to_float128): Likewise.
>
>         * config/rs6000/rs6000.md (UNSPEC_ROUND_TO_ODD): New unspecs for
>         ISA 3.0 hardware IEEE 128-bit floating point.
>         (UNSPEC_IEEE128_MOVE): Likewise.
>         (UNSPEC_IEEE128_CONVERT): Likewise.
>         (FMA_F): Add support for IEEE 128-bit floating point hardware
>         support.
>         (Ff): Add support for DImode.
>         (Fv): Likewise.
>         (any_fix code iterator): New and updated iterators for IEEE
>         128-bit floating point hardware support.
>         (any_float code iterator): Likewise.
>         (s code attribute): Likewise.
>         (su code attribute): Likewise.
>         (az code attribute): Likewise.
>         (neg<mode>2, FLOAT128 iterator): Add support for IEEE 128-bit
>         floating point hardware support.
>         (abs<mode>2, FLOAT128 iterator): Likewise.
>         (add<mode>3, IEEE128 iterator): New insns for IEEE 128-bit
>         floating point hardware.
>         (sub<mode>3, IEEE128 iterator): Likewise.
>         (mul<mode>3, IEEE128 iterator): Likewise.
>         (div<mode>3, IEEE128 iterator): Likewise.
>         (copysign<mode>3, IEEE128 iterator): Likewise.
>         (sqrt<mode>2, IEEE128 iterator): Likewise.
>         (neg<mode>2, IEEE128 iterator): Likewise.
>         (abs<mode>2, IEEE128 iterator): Likewise.
>         (nabs<mode>2, IEEE128 iterator): Likewise.
>         (fma<mode>4_hw, IEEE128 iterator): Likewise.
>         (fms<mode>4_hw, IEEE128 iterator): Likewise.
>         (nfma<mode>4_hw, IEEE128 iterator): Likewise.
>         (nfms<mode>4_hw, IEEE128 iterator): Likewise.
>         (extend<SFDF:mode><IEEE128:mode>2_hw): Likewise.
>         (trunc<mode>df2_hw, IEEE128 iterator): Likewise.
>         (trunc<mode>sf2_hw, IEEE128 iterator): Likewise.
>         (fix_fixuns code attribute): Likewise.
>         (float_floatuns code attribute): Likewise.
>         (<fix_fixuns>_<mode>si2_hw): Likewise.
>         (<fix_fixuns>_<mode>di2_hw): Likewise.
>         (<float_floatuns>_<mode>si2_hw): Likewise.
>         (<float_floatuns>_<mode>di2_hw): Likewise.
>         (xscvqp<su>wz_<mode>): Likewise.
>         (xscvqp<su>dz_<mode>): Likewise.
>         (xscv<su>dqp_<mode): Likewise.
>         (ieee128_mfvsrd): Likewise.
>         (ieee128_mfvsrwz): Likewise.
>         (ieee128_mtvsrw): Likewise.
>         (ieee128_mtvsrd): Likewise.
>         (trunc<mode>df2_odd): Likewise.
>         (cmp<mode>_h): Likewise.
>
> [gcc/testsuite]
> 2015-11-08  Michael Meissner  <meiss...@linux.vnet.ibm.com>
>
>         * gcc.target/powerpc/float128-hw.c: New test for IEEE 128-bit
>         hardware floating point support.

Please change the attribute to "uns" as suggested by Segher.

    > +(define_code_attr fix_fixuns  [(fix   "fix")   (unsigned_fix
"fixuns")])
    > +(define_code_attr float_floatuns [(float "float")
(unsigned_float "floatuns")])

    You could instead do an "uns" attribute so you would write fix<uns> etc.

Okay with that change.

We need to think more about ieee128_mtvsw pattern.

Thanks, David

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