On Wed, Nov 11, 2015 at 10:34 AM, Jim Wilson <jim.wil...@linaro.org> wrote: > I had to disable the cortex-a57 fma steering pass in the aarch64 port > while testing the patch. A bootstrap for aarch64 configured > --with-cpu=cortex-a57 gives multiple ICEs while building the stage1 > libstdc++. The ICEs are in scan_rtx_reg at regrename.c:1074. This > looks vaguely similar to PR 66785.
It looks like there is already a discussion of this issue in the "Preferred rename register in regrename pass" thread, though I'm not sure yet if it is the same issue or a closely related one. Jim
