On 09/23/2015 06:53 AM, Richard Biener wrote: > I think independent improvements are > > 1) remove (most) of the bool patterns from the vectorizer > > 2) make VEC_COND_EXPR not have a GENERIC comparison embedded > > (same for COND_EXPR?)
Careful. The reason that COND_EXPR have embedded comparisons is to handle flags registers. You can't separate the setting of the flags from the using of the flags on most targets, because there's only one flags register. The same is true for VEC_COND_EXPR with respect to MIPS. The base architecture has 8 floating-point comparison result flags, and the vector compare instructions are fixed to set fcc[0:width-1]. So again there's only one possible output location for the result of the compare. MIPS is going to present a problem if we attempt to generalize logical combinations of these vector<bool>, since one has to use several instructions (or one insn and pre-load constants into two registers) to get the fcc bits out into a form we can manipulate. r~
