On Tue, 2015-09-22 at 17:53 +0200, Bernd Schmidt wrote: > On 09/22/2015 03:35 PM, Oleg Endo wrote: > > On SH, the result of comparisons etc. is stored in the T_REG. It's a 1 > > bit reg but described as SImode. To get the T_REG into another reg, > > there's this insn: > > > > (define_insn "movt" > > [(set (match_operand:SI 0 "arith_reg_dest" "=r") > > (match_operand:SI 1 "t_reg_operand"))] > > "TARGET_SH1" > > "movt %0" > > [(set_attr "type" "arith")]) > > > > where "t_reg_operand" accepts various forms of the T_REG via > > reg,subreg,sign_extend,zero_extend (to get better combine results). > > > > Now I'd like to extend the "t_reg_operand" predicate to accept something > > like > > > > (set (reg:SI) (ne:SI (reg:SI 147 t) (const_int 0))) > > Is there a reason you're not just adding that as a new pattern rather > than trying to overload the predicate?
Basically, because the predicate is also used several in other places, for example in the recursive matching in treg_set_expr. I'm trying to avoid duplicating code to match stuff that eventually evaluates to "T is 1" or "T is 0". Like (set (reg:SI) (ne:SI (reg:SI 147 t) (const_int 0))) is the same as (set (reg:SI) (eq:SI (reg:SI 147 t) (const_int 1))) Cheers, Oleg
