Hi,
On 07 Sep 19:07, Alexander Fomin wrote:
> (define_insn "<mask_codefor><code><mode>3<mask_name>"
> - [(set (match_operand:VI 0 "register_operand" "=x,v")
> - (any_logic:VI
> - (match_operand:VI 1 "nonimmediate_operand" "%0,v")
> - (match_operand:VI 2 "nonimmediate_operand" "xm,vm")))]
> + [(set (match_operand:VI48_AVX_AVX512F 0 "register_operand" "=x,v")
> + (any_logic:VI48_AVX_AVX512F
> + (match_operand:VI48_AVX_AVX512F 1 "nonimmediate_operand" "%0,v")
> + (match_operand:VI48_AVX_AVX512F 2 "nonimmediate_operand" "xm,vm")))]
> "TARGET_SSE && <mask_mode512bit_condition>
> && ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)"
> {
> @@ -11109,13 +11117,104 @@
> case V4DImode:
> case V4SImode:
> case V2DImode:
> - if (TARGET_AVX512VL)
> + tmp = TARGET_AVX512VL ? "p<logic><ssemodesuffix>" : "p<logic>";
Suppose masking is applied and 1st alternative chosen...
> + break;
> + default:
> + gcc_unreachable ();
> + }
> + break;
> +
> + case MODE_V16SF:
> + gcc_assert (TARGET_AVX512F);
> + case MODE_V8SF:
> + gcc_assert (TARGET_AVX);
> + case MODE_V4SF:
> + gcc_assert (TARGET_SSE);
> +
> + tmp = "<logic>ps";
> + break;
> +
> + default:
> + gcc_unreachable ();
> + }
> +
> + switch (which_alternative)
> + {
> + case 0:
> + ops = "%s\t{%%2, %%0|%%0, %%2}";
We'll reach here having p<logic> %xmm17, %xmm18 w/o even mention of mask
register.
I think we need to check here if masking is needed and emit EVEX version (3
args + mask).
> + break;
> + case 1:
> + ops = "v%s\t{%%2, %%1, %%0<mask_operand3_1>|%%0<mask_operand3_1>, %%1,
> %%2}";
> + break;
> + default:
> + gcc_unreachable ();
> + }
> +
> + snprintf (buf, sizeof (buf), ops, tmp);
> + return buf;
> +}
...
> +
> +(define_insn "*<code><mode>3"
> + [(set (match_operand:VI12_AVX_AVX512F 0 "register_operand" "=x,v")
> + (any_logic: VI12_AVX_AVX512F
> + (match_operand:VI12_AVX_AVX512F 1 "nonimmediate_operand" "%0,v")
> + (match_operand:VI12_AVX_AVX512F 2 "nonimmediate_operand" "xm,vm")))]
> + "TARGET_SSE && ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)"
> +{
> + static char buf[64];
> + const char *ops;
> + const char *tmp;
> +
> + switch (get_attr_mode (insn))
> + {
> + case MODE_XI:
> + gcc_assert (TARGET_AVX512F);
> + case MODE_OI:
> + gcc_assert (TARGET_AVX2 || TARGET_AVX512VL);
> + case MODE_TI:
> + gcc_assert (TARGET_SSE2 || TARGET_AVX512VL);
> + switch (<MODE>mode)
> + {
> + case V64QImode:
> + case V32HImode:
> + if (TARGET_AVX512F)
> {
> - tmp = "p<logic><ssemodesuffix>";
> + tmp = "p<logic>q";
> break;
> }
> - default:
> + case V32QImode:
> + case V16HImode:
> + case V16QImode:
> + case V8HImode:
> tmp = TARGET_AVX512VL ? "p<logic>q" : "p<logic>";
Despite of alternative chosen, you force insn to be p<logic>q (when compiled w/
-mavx512vl).
> + break;
> + default:
> + gcc_unreachable ();
> }
> break;
>
> @@ -11139,7 +11238,7 @@
> ops = "%s\t{%%2, %%0|%%0, %%2}";
So, here you'll emit, e.g. "pandq %xmm16, %xmm17"
If think it'll be better to attach AVX-512VL related suffix while discriminating
alternatives.
> break;
> case 1:
> - ops = "v%s\t{%%2, %%1, %%0<mask_operand3_1>|%%0<mask_operand3_1>, %%1,
> %%2}";
> + ops = "v%s\t{%%2, %%1, %%0|%%0, %%1, %%2}";
> break;
> default:
> gcc_unreachable ();
...
--
Thanks, K
