On Tue, Jul 28, 2015 at 12:25:40PM +0100, Alan Lawrence wrote: > gcc/ChangeLog: > > * config/aarch64/aarch64.c (aarch64_vector_mode_supported_p): Support > V4HFmode and V8HFmode. > (aarch64_split_simd_move): Add case for V8HFmode. > * config/aarch64/aarch64-builtins.c (v4hf_UP, v8hf_UP): Define. > (aarch64_simd_builtin_std_type): Handle HFmode. > (aarch64_init_simd_builtin_types): Include Float16x4_t and Float16x8_t. > > * config/aarch64/aarch64-simd.md (mov<mode>, aarch64_get_lane<mode>, > aarch64_ld1<VALL:mode>, aarch64_st1<VALL:mode): Use VALL_F16 iterator. > (aarch64_be_ld1<mode>, aarch64_be_st1<mode>): Use VALLDI_F16 iterator. > > * config/aarch64/aarch64-simd-builtin-types.def: Add Float16x4_t, > Float16x8_t. > > * config/aarch64/aarch64-simd-builtins.def (ld1, st1): Use VALL_F16. > * config/aarch64/arm_neon.h (float16x4_t, float16x8_t, float16_t): > New typedefs. > (vget_lane_f16, vgetq_lane_f16, vset_lane_f16, vsetq_lane_f16, > vld1_f16, vld1q_f16, vst1_f16, vst1q_f16, vst1_lane_f16, > vst1q_lane_f16): New. > * config/aarch64/iterators.md (VD, VQ, VQ_NO2E): Add vectors of HFmode. > (VALLDI_F16, VALL_F16): New. > (Vmtype, VEL, VCONQ, VHALF, VRL3, VRL4, V_TWO_ELEM, V_THREE_ELEM, > V_FOUR_ELEM, q): Add cases for V4HF and V8HF. > (VDBL, VRL2): Add V4HF case. > > gcc/testsuite/ChangeLog: > > * g++.dg/abi/mangle-neon-aarch64.C: Add cases for float16x4_t and > float16x8_t. > * gcc.target/aarch64/vset_lane_1.c: Likewise.
> * gcc.target/aarch64/vld1-vst1_1.c: Likewise, also missing float32x4_t. > * gcc.target/aarch64/vld1_lane.c: Remove unused constants; add cases > for float16x4_t and float16x8_t. I'd have preferred the unrelated changes here as separate patches. If you pull them out, they are OK to commit independent of this patch. > diff --git a/gcc/config/aarch64/iterators.md b/gcc/config/aarch64/iterators.md > index a6b351b..a7aaa52 100644 > --- a/gcc/config/aarch64/iterators.md > +++ b/gcc/config/aarch64/iterators.md > @@ -97,12 +97,20 @@ > ;; Vector Float modes with 2 elements. > (define_mode_iterator V2F [V2SF V2DF]) > > -;; All modes. > +;; All vector modes on which we support any arithmetic operations. > (define_mode_iterator VALL [V8QI V16QI V4HI V8HI V2SI V4SI V2DI V2SF V4SF > V2DF]) > > -;; All vector modes and DI. > +;; All vector modes, including HF modes on which we cannot operate The wording here is a bit off, we can operate on them - for a limited set of operations (and you are missing a full stop). How about something like: All vector modes suitable for moving, loading and storing. > +(define_mode_iterator VALL_F16 [V8QI V16QI V4HI V8HI V2SI V4SI V2DI > + V4HF V8HF V2SF V4SF V2DF]) > + > +;; All vector modes barring F16, plus DI. "barring HF modes" for consistency with the above comment. > (define_mode_iterator VALLDI [V8QI V16QI V4HI V8HI V2SI V4SI V2DI V2SF V4SF > V2DF DI]) > > +;; All vector modes and DI. > +(define_mode_iterator VALLDI_F16 [V8QI V16QI V4HI V8HI V2SI V4SI V2DI > + V4HF V8HF V2SF V4SF V2DF DI]) > + > ;; All vector modes and DI and DF. Except HF modes. > (define_mode_attr VRL2 [(V8QI "V32QI") (V4HI "V16HI") > + (V4HF "V16HF") > (V2SI "V8SI") (V2SF "V8SF") > (DI "V4DI") (DF "V4DF") > (V16QI "V32QI") (V8HI "V16HI") V8HF missing? > @@ -549,16 +563,20 @@ > (V2DI "V4DI") (V2DF "V4DF")]) > > (define_mode_attr VRL3 [(V8QI "V48QI") (V4HI "V24HI") > + (V4HF "V24HF") > (V2SI "V12SI") (V2SF "V12SF") > (DI "V6DI") (DF "V6DF") > (V16QI "V48QI") (V8HI "V24HI") > + (V8HF "V48HF") This should be V24HF? > (V4SI "V12SI") (V4SF "V12SF") > (V2DI "V6DI") (V2DF "V6DF")]) > > (define_mode_attr VRL4 [(V8QI "V64QI") (V4HI "V32HI") > + (V4HF "V32HF") > (V2SI "V16SI") (V2SF "V16SF") > (DI "V8DI") (DF "V8DF") > (V16QI "V64QI") (V8HI "V32HI") > + (V8HF "V32HF") > (V4SI "V16SI") (V4SF "V16SF") > (V2DI "V8DI") (V2DF "V8DF")]) Ah ok, I see what is going on here... None of these are actually used for the 128-bit vector modes, so missing entries or incorrect entries for V8HFmode don't matter. However... We should do something consistent, so I think we should either add the correct mappings for V8HF, or remove all 128-bit modes from these three mode attributes. Thanks, James
