Charles Baylis wrote:
On 8 June 2015 at 10:33, Alan Lawrence <alan.lawre...@arm.com> wrote:
Thanks for working on this!
I'd been fiddling around with a patch with some similar elements to this,
but many trials with union types, subregs, etc., all worsened the register
allocation and led to more unnecessary shuffling / moves.
Kugan has been looking into this at Linaro. We should avoid
duplicating effort here.
Yes. I stopped short of looking into the internals of the register allocator,
although I believe any proper solution is going to have to make changes here.
However, I am working on (/nearly finished, just some tidying!) a patch series
to add D-registers to TARGET_ARRAY_MODE_SUPPORTED_P, which may help matters.
The only real
thing I tried which you don't do here, was to introduce a set_dreg expander
to clean up some of those macro definitions in arm_neon.h. That could easily
follow in a separate patch if desired!
I'd prefer that to be a separate step.
Sure. (*If* we go that route - I hope to have another look after
aarch64_array_mode_supported_p).
Cheers,
Alan