[Patch ARM] Use dmb ish instead of dmb sy

[Ramana Radhakrishnan]

Hi,

	A patch that's been sitting in my tree for sometime has been something 
to fix up using dmb ish instead of dmb sy in the ARM backend. This 
brings us in line with the AArch64 backend's behaviour as well for the 
same. A future cleanup to write this in the form of memory_fences and 
exploit all the memory models is something that should be considered in 
the near future, but that's not a part of this patch.

	* config/arm/sync.md (*memory_barrier): Use dmb ish, adjust tab for 
older architectures.

Applied to trunk.

regards
Ramana
Index: gcc/config/arm/sync.md
===================================================================
--- gcc/config/arm/sync.md      (revision 224315)
+++ gcc/config/arm/sync.md      (working copy)
@@ -50,14 +50,11 @@
   {
     if (TARGET_HAVE_DMB)
       {
-       /* Note we issue a system level barrier. We should consider issuing
-          a inner shareabilty zone barrier here instead, ie. "DMB ISH".  */
-       /* ??? Differentiate based on SEQ_CST vs less strict?  */
-       return "dmb\tsy";
+       return "dmb\\tish";
       }
 
     if (TARGET_HAVE_DMB_MCR)
-      return "mcr\tp15, 0, r0, c7, c10, 5";
+      return "mcr\\tp15, 0, r0, c7, c10, 5";
 
     gcc_unreachable ();
   }