Ping.
Thanks,
Kyrill
On 12/05/15 10:07, Kyrill Tkachov wrote:
Ping.
https://gcc.gnu.org/ml/gcc-patches/2015-05/msg00013.html
Thanks,
Kyrill
On 01/05/15 09:24, Kyrill Tkachov wrote:
Hi all,
It occurs to me that in the IOR-of-shifts form of the rev16 operation we should
be costing the operand properly.
For that we'd want to reuse the aarch_rev16_p function that does all the heavy
lifting and get it to write the
innermost operand of the rev16 for further costing. In the process we relax
that function a bit to accept any
rtx as the operand, not just REGs so that we can calculate the cost of moving
them in a register appropriately.
This patch does just that and updates the arm and aarch64 callsites
appropriately so that the operands are
processed properly.
In practice I don't expect this to make much difference since this patterns
occurs rarely anyway, but it seems
like the 'right thing to do' (TM).
Bootstrapped and tested on arm,aarch64.
Ok for trunk?
Thanks,
Kyrill
2015-05-01 Kyrylo Tkachov <kyrylo.tkac...@arm.com>
* config/arm/aarch-common-protos.h (aarch_rev16_p): Update signature
to take a second argument.
* config/arm/aarch-common.c (aarch_rev16_p): Add second argument.
Write inner-most rev16 argument to it if recognised.
(aarch_rev16_p_1): Likewise.
* config/arm/arm.c (arm_new_rtx_costs): Properly cost rev16 operand
in the IOR case.
* config/aarch64/aarch64.c (aarch64_rtx_costs): Likewise.
