Hello!
This part merges *fop_<mode>_1_sse with *fop_<mode>_1_mixed.
2015-04-16 Uros Bizjak <ubiz...@gmail.com>
* config/i386/predicates.md (register_mixssei387nonimm_operand): New.
* config/i386/i386.md (*fop_<mode>_1_mixed): Merge with
*fop_<mode>_1_sse using enabled attribute. Use
register_mixssei387nonimm_operand operand 1 predicate. Change
alternative 3 constraints from "x" to "v".
Bootsttapped and regression tested on x86_64-linux-gnu {,-m32} and
committed to mainline SVN.
Uros.
Index: config/i386/i386.md
===================================================================
--- config/i386/i386.md (revision 222145)
+++ config/i386/i386.md (working copy)
@@ -13602,12 +13602,26 @@
(const_string "fop")))
(set_attr "mode" "<MODE>")])
+(define_insn "*rcpsf2_sse"
+ [(set (match_operand:SF 0 "register_operand" "=x")
+ (unspec:SF [(match_operand:SF 1 "nonimmediate_operand" "xm")]
+ UNSPEC_RCP))]
+ "TARGET_SSE_MATH"
+ "%vrcpss\t{%1, %d0|%d0, %1}"
+ [(set_attr "type" "sse")
+ (set_attr "atom_sse_attr" "rcp")
+ (set_attr "btver2_sse_attr" "rcp")
+ (set_attr "prefix" "maybe_vex")
+ (set_attr "mode" "SF")])
+
(define_insn "*fop_<mode>_1_mixed"
- [(set (match_operand:MODEF 0 "register_operand" "=f,f,x,x")
+ [(set (match_operand:MODEF 0 "register_operand" "=f,f,x,v")
(match_operator:MODEF 3 "binary_fp_operator"
- [(match_operand:MODEF 1 "nonimmediate_operand" "0,fm,0,x")
- (match_operand:MODEF 2 "nonimmediate_operand" "fm,0,xm,xm")]))]
- "SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_MIX_SSE_I387
+ [(match_operand:MODEF 1
+ "register_mixssei387nonimm_operand" "0,fm,0,v")
+ (match_operand:MODEF 2
+ "nonimmediate_operand" "fm,0,xm,vm")]))]
+ "SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH
&& !COMMUTATIVE_ARITH_P (operands[3])
&& !(MEM_P (operands[1]) && MEM_P (operands[2]))"
"* return output_387_binary_op (insn, operands);"
@@ -13628,39 +13642,13 @@
(const_string "fop")))
(set_attr "isa" "*,*,noavx,avx")
(set_attr "prefix" "orig,orig,orig,vex")
- (set_attr "mode" "<MODE>")])
+ (set_attr "mode" "<MODE>")
+ (set (attr "enabled")
+ (cond [(eq_attr "alternative" "0,1")
+ (symbol_ref "TARGET_MIX_SSE_I387")
+ ]
+ (const_string "*")))])
-(define_insn "*rcpsf2_sse"
- [(set (match_operand:SF 0 "register_operand" "=x")
- (unspec:SF [(match_operand:SF 1 "nonimmediate_operand" "xm")]
- UNSPEC_RCP))]
- "TARGET_SSE_MATH"
- "%vrcpss\t{%1, %d0|%d0, %1}"
- [(set_attr "type" "sse")
- (set_attr "atom_sse_attr" "rcp")
- (set_attr "btver2_sse_attr" "rcp")
- (set_attr "prefix" "maybe_vex")
- (set_attr "mode" "SF")])
-
-(define_insn "*fop_<mode>_1_sse"
- [(set (match_operand:MODEF 0 "register_operand" "=x,x")
- (match_operator:MODEF 3 "binary_fp_operator"
- [(match_operand:MODEF 1 "register_operand" "0,x")
- (match_operand:MODEF 2 "nonimmediate_operand" "xm,xm")]))]
- "SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH
- && !COMMUTATIVE_ARITH_P (operands[3])"
- "* return output_387_binary_op (insn, operands);"
- [(set (attr "type")
- (cond [(match_operand:MODEF 3 "mult_operator")
- (const_string "ssemul")
- (match_operand:MODEF 3 "div_operator")
- (const_string "ssediv")
- ]
- (const_string "sseadd")))
- (set_attr "isa" "noavx,avx")
- (set_attr "prefix" "orig,vex")
- (set_attr "mode" "<MODE>")])
-
;; This pattern is not fully shadowed by the pattern above.
(define_insn "*fop_<mode>_1_i387"
[(set (match_operand:MODEF 0 "register_operand" "=f,f")
Index: config/i386/predicates.md
===================================================================
--- config/i386/predicates.md (revision 222145)
+++ config/i386/predicates.md (working copy)
@@ -115,6 +115,12 @@
(match_operand 0 "nonmemory_operand")
(match_operand 0 "general_operand")))
+;; Match register operands, include memory operand for TARGET_MIX_SSE_I387.
+(define_predicate "register_mixssei387nonimm_operand"
+ (if_then_else (match_test "TARGET_MIX_SSE_I387")
+ (match_operand 0 "nonimmediate_operand")
+ (match_operand 0 "register_operand")))
+
;; Return true if VALUE is symbol reference
(define_predicate "symbol_operand"
(match_code "symbol_ref"))
