On Fri, Mar 13, 2015 at 7:56 PM, Ramana Radhakrishnan
<ramana....@googlemail.com> wrote:
> On Fri, Mar 6, 2015 at 7:46 AM, Bin Cheng <bin.ch...@arm.com> wrote:
>> Hi,
>> This patch is the second part fixing memset-inline-{4,5,6,8,9}.c failures on
>> cortex-a9. It adds a function checking CPU tuning information in dejagnu,
>> it also uses that function to skip related testcase when we are compiling
>> for cortex-a9 tune.
>
> Skips the related testcase for all tests where the tuning information
> doesn't use neon. I think this technique can be used to clean up a
> number of multilib related failures in the gcc.target/arm testsuite.
Actually these are all related cases. Cases {1,2,3} are intended for
non-neon target inlining test, case 7 is an executable test which
should be run what ever the target supports.
>
>>
>> Build and test on arm-none-eabi. Is it OK?
>>
>> gcc/testsuite/ChangeLog
>> 2015-03-06 Bin Cheng <bin.ch...@arm.com>
>>
>> * lib/target-supports.exp (arm_tune_string_ops_prefer_neon): New.
>> * gcc.target/arm/memset-inline-4.c: Skip for
>> arm_tune_string_ops_prefer_neon.
>> * gcc.target/arm/memset-inline-5.c: Ditto.
>> * gcc.target/arm/memset-inline-6.c: Ditto.
>> * gcc.target/arm/memset-inline-8.c: Ditto.
>> * gcc.target/arm/memset-inline-9.c: Ditto.
>
> Ok, please document the new dejagnu helper routine in sourcebuild.texi
Done. Patch updated, I will push both patches in if you are ok with it.
Thanks,
bin
2015-03-17 Bin Cheng <bin.ch...@arm.com>
* doc/sourcebuild.texi (arm_tune_string_ops_prefer_neon): New.
gcc/testsuite/ChangeLog
2015-03-17 Bin Cheng <bin.ch...@arm.com>
* lib/target-supports.exp (arm_tune_string_ops_prefer_neon): New.
* gcc.target/arm/memset-inline-4.c: Skip for
arm_tune_string_ops_prefer_neon.
* gcc.target/arm/memset-inline-5.c: Ditto.
* gcc.target/arm/memset-inline-6.c: Ditto.
* gcc.target/arm/memset-inline-8.c: Ditto.
* gcc.target/arm/memset-inline-9.c: Ditto.
Index: gcc/testsuite/gcc.target/arm/memset-inline-4.c
===================================================================
--- gcc/testsuite/gcc.target/arm/memset-inline-4.c (revision 221097)
+++ gcc/testsuite/gcc.target/arm/memset-inline-4.c (working copy)
@@ -1,6 +1,5 @@
/* { dg-do run } */
-/* { dg-skip-if "Don't inline memset using neon instructions on cortex-a9" {
*-*-* } { "-mcpu=cortex-a9" } { "" } } */
-/* { dg-skip-if "Don't inline memset using neon instructions on cortex-a9" {
*-*-* } { "-mtune=cortex-a9" } { "" } } */
+/* { dg-skip-if "Don't inline memset using neon instructions" { !
arm_tune_string_ops_prefer_neon } } */
/* { dg-options "-save-temps -O2 -fno-inline" } */
/* { dg-add-options "arm_neon" } */
Index: gcc/testsuite/gcc.target/arm/memset-inline-5.c
===================================================================
--- gcc/testsuite/gcc.target/arm/memset-inline-5.c (revision 221097)
+++ gcc/testsuite/gcc.target/arm/memset-inline-5.c (working copy)
@@ -1,6 +1,5 @@
/* { dg-do run } */
-/* { dg-skip-if "Don't inline memset using neon instructions on cortex-a9" {
*-*-* } { "-mcpu=cortex-a9" } { "" } } */
-/* { dg-skip-if "Don't inline memset using neon instructions on cortex-a9" {
*-*-* } { "-mtune=cortex-a9" } { "" } } */
+/* { dg-skip-if "Don't inline memset using neon instructions" { !
arm_tune_string_ops_prefer_neon } } */
/* { dg-options "-save-temps -O2 -fno-inline" } */
/* { dg-add-options "arm_neon" } */
Index: gcc/testsuite/gcc.target/arm/memset-inline-6.c
===================================================================
--- gcc/testsuite/gcc.target/arm/memset-inline-6.c (revision 221097)
+++ gcc/testsuite/gcc.target/arm/memset-inline-6.c (working copy)
@@ -1,6 +1,5 @@
/* { dg-do run } */
-/* { dg-skip-if "Don't inline memset using neon instructions on cortex-a9" {
*-*-* } { "-mcpu=cortex-a9" } { "" } } */
-/* { dg-skip-if "Don't inline memset using neon instructions on cortex-a9" {
*-*-* } { "-mtune=cortex-a9" } { "" } } */
+/* { dg-skip-if "Don't inline memset using neon instructions" { !
arm_tune_string_ops_prefer_neon } } */
/* { dg-options "-save-temps -O2 -fno-inline" } */
/* { dg-add-options "arm_neon" } */
Index: gcc/testsuite/gcc.target/arm/memset-inline-8.c
===================================================================
--- gcc/testsuite/gcc.target/arm/memset-inline-8.c (revision 221097)
+++ gcc/testsuite/gcc.target/arm/memset-inline-8.c (working copy)
@@ -1,6 +1,5 @@
/* { dg-do run } */
-/* { dg-skip-if "Don't inline memset using neon instructions on cortex-a9" {
*-*-* } { "-mcpu=cortex-a9" } { "" } } */
-/* { dg-skip-if "Don't inline memset using neon instructions on cortex-a9" {
*-*-* } { "-mtune=cortex-a9" } { "" } } */
+/* { dg-skip-if "Don't inline memset using neon instructions" { !
arm_tune_string_ops_prefer_neon } } */
/* { dg-options "-save-temps -O2 -fno-inline" } */
/* { dg-add-options "arm_neon" } */
Index: gcc/testsuite/gcc.target/arm/memset-inline-9.c
===================================================================
--- gcc/testsuite/gcc.target/arm/memset-inline-9.c (revision 221097)
+++ gcc/testsuite/gcc.target/arm/memset-inline-9.c (working copy)
@@ -1,6 +1,5 @@
/* { dg-do run } */
-/* { dg-skip-if "Don't inline memset using neon instructions on cortex-a9" {
*-*-* } { "-mcpu=cortex-a9" } { "" } } */
-/* { dg-skip-if "Don't inline memset using neon instructions on cortex-a9" {
*-*-* } { "-mtune=cortex-a9" } { "" } } */
+/* { dg-skip-if "Don't inline memset using neon instructions" { !
arm_tune_string_ops_prefer_neon } } */
/* { dg-options "-save-temps -Os -fno-inline" } */
/* { dg-add-options "arm_neon" } */
Index: gcc/testsuite/lib/target-supports.exp
===================================================================
--- gcc/testsuite/lib/target-supports.exp (revision 221097)
+++ gcc/testsuite/lib/target-supports.exp (working copy)
@@ -2954,6 +2954,14 @@ proc check_effective_target_arm_cortex_m { } {
} "-mthumb"]
}
+# Return 1 if this compilation turns on string_ops_prefer_neon on.
+
+proc check_effective_target_arm_tune_string_ops_prefer_neon { } {
+ return [check_no_messages_and_pattern arm_tune_string_ops_prefer_neon
"@string_ops_prefer_neon:\t1" assembly {
+ int foo (void) { return 0; }
+ } "-O2 -mprint-tune-info" ]
+}
+
# Return 1 if the target supports executing NEON instructions, 0
# otherwise. Cache the result.
Index: gcc/doc/sourcebuild.texi
===================================================================
--- gcc/doc/sourcebuild.texi (revision 221097)
+++ gcc/doc/sourcebuild.texi (working copy)
@@ -1527,6 +1527,9 @@ Some multilibs may be incompatible with this optio
@item arm_neon
ARM target supports generating NEON instructions.
+@item arm_tune_string_ops_prefer_neon
+Test CPU tune supports inlining string operations with NEON instructions.
+
@item arm_neon_hw
Test system supports executing NEON instructions.
