-----Original Message----- From: Michael Eager [mailto:ea...@eagerm.com] Sent: Thursday, February 26, 2015 4:29 AM To: Ajit Kumar Agarwal; GCC Patches Cc: Vinod Kathail; Shail Aditya Gupta; Vidhumouli Hunsigida; Nagaraju Mekala Subject: Re: [Patch,microblaze]: Optimized usage of pcmp conditional instruction.
On 02/25/15 02:19, Ajit Kumar Agarwal wrote:
> Hello All:
>
> Please find the patch for the optimized usage of pcmp instructions in
> microblaze. No regressions is seen In deja GNU tests. There are many
> testcases that are already there in deja GNU to check the generation of
> pcmpne/pcmpeq instructions and are used to check the validity.
>
> commit b74acf44ce4286649e5be7cff7518d814cb2491f
> Author: Ajit Kumar Agarwal <ajitkum@xhdspdgnu.(none)>
> Date: Wed Feb 25 15:33:02 2015 +0530
>
> [Patch,microblaze]: Optimized usage of pcmp conditional instruction.
>
> The changes are made in the patch for optimized usage of pcmpne/pcmpeq
> instructions. The xor with register to register is replaced with pcmpeq
> /pcmpne instructions and for immediate check still the xori will be used.
> The purpose of the change is to acheive the aggressive usage of pcmpne
> /pcmpeq instructions instead of xor being used for comparison.
>
> ChangeLog:
> 2015-02-25 Ajit Agarwal <ajit...@xilinx.com>
>
> * config/microblaze/microblaze.md (cbranchsi4): Added immediate
> constraints.
> (cbranchsi4_reg): New.
> * config/microblaze/microblaze.c
> (microblaze_expand_conditional_branch_reg): New.
> * config/microblaze/microblaze-protos.h
> (microblaze_expand_conditional_branch_reg): New prototype.
+ if (cmp_op1 == const0_rtx)
+ {
+ comp_reg = cmp_op0;
+ condition = gen_rtx_fmt_ee (signed_condition (code),
+ SImode, comp_reg, const0_rtx);
+ emit_jump_insn (gen_condjump (condition, label1));
+ }
+
+ else if (code == EQ || code == NE)
+ {
+ if (code == NE)
+ {
+ emit_insn (gen_sne_internal_pat (comp_reg, cmp_op0,
+ cmp_op1));
+ condition = gen_rtx_NE (SImode, comp_reg, const0_rtx);
+ }
+ else
+ {
+ emit_insn (gen_seq_internal_pat (comp_reg,
+ cmp_op0, cmp_op1));
+ condition = gen_rtx_EQ (SImode, comp_reg, const0_rtx);
+ }
+ emit_jump_insn (gen_condjump (condition, label1));
+ }
+ else
+ {
...
>>No blank line between end brace of if and else.
>>Replace with
>>+ else if (code == EQ)
>>+ {
>>+ emit_insn (gen_seq_internal_pat (comp_reg, cmp_op0, cmp_op1));
>>+ condition = gen_rtx_EQ (SImode, comp_reg, const0_rtx);
>>+ emit_jump_insn (gen_condjump (condition, label1));
>>+ }
>>+ else if (code == NE)
>>+ {
>>+ emit_insn (gen_sne_internal_pat (comp_reg, cmp_op0, cmp_op1));
>>+ condition = gen_rtx_NE (SImode, comp_reg, const0_rtx);
>>+ emit_jump_insn (gen_condjump (condition, label1));
>>+ }
>>+ else
>>+ {
>>...
>>--
Changes are incorporated. Please find the log of the updated patch.
commit 91f275c144165320850dffffdf18e3a1e059a66c
Author: Ajit Kumar Agarwal <ajitkum@xhdspdgnu.(none)>
Date: Fri Mar 6 09:55:11 2015 +0530
[Patch,microblaze]: Optimized usage of pcmp conditional instruction.
The changes are made in the patch for optimized usage of pcmpne/pcmpeq
instructions. The xor with register to register is replaced with pcmpeq
/pcmpne instructions and for immediate check still the xori will be used.
The purpose of the change is to acheive the aggressive usage of pcmpne
/pcmpeq instructions instead of xor being used for comparison.
ChangeLog:
2015-03-06 Ajit Agarwal <ajit...@xilinx.com>
* config/microblaze/microblaze.md (cbranchsi4): Added immediate
constraints.
(cbranchsi4_reg): New.
* config/microblaze/microblaze.c
(microblaze_expand_conditional_branch_reg): New.
* config/microblaze/microblaze-protos.h
(microblaze_expand_conditional_branch_reg): New prototype.
Signed-off-by:Ajit Agarwal ajit...@xilinx.com
Thanks & Regards
Ajit
Michael Eager ea...@eagercon.com
1960 Park Blvd., Palo Alto, CA 94306 650-325-8077
0001-Patch-microblaze-Optimized-usage-of-pcmp-conditional.patch
Description: 0001-Patch-microblaze-Optimized-usage-of-pcmp-conditional.patch
