On Sat, Feb 28, 2015 at 06:08:33PM +0000, Jan Hubicka wrote:
> > 
> > Hi Honza,
> > 
> > This is more a note for other interested AArch64 testers, but this patch
> > breaks some tests on aarch64-none-elf. Looking at the test output, this
> > is a problem with the tests than with your patch. We now eliminate some
> > function bodies which are identical across test functions, causing us to
> > fail some scan-assembler directives.
> > 
> > The fix is straightforward, we just need to add -fno-ipa-icf to get things
> > working again. This keeps the spirit of the original tests. I'll propose
> > a patch along those lines on Monday.
> > 
> > Thanks,
> > James
> > 
> > ---
> > 
> >         PASS->FAIL: gcc.target/aarch64/atomic-comp-swap-release-acquire.c 
> > scan-assembler-times ldaxr\tw[0-9]+, \\[x[0-9]+\\] 4
> >         PASS->FAIL: gcc.target/aarch64/atomic-comp-swap-release-acquire.c 
> > scan-assembler-times stlxr\tw[0-9]+, w[0-9]+, \\[x[0-9]+\\] 4
> >         PASS->FAIL: gcc.target/aarch64/vect_saddl_1.c scan-assembler-times 
> > saddl2\tv[0-9]+.2d, v[0-9]+.4s, v[0-9]+.4s 2
> >         PASS->FAIL: gcc.target/aarch64/vect_saddl_1.c scan-assembler-times 
> > saddl\tv[0-9]+.2d, v[0-9]+.2s, v[0-9]+.2s 2
> >         PASS->FAIL: gcc.target/aarch64/vect_saddl_1.c scan-assembler-times 
> > ssubl2\tv[0-9]+.2d, v[0-9]+.4s, v[0-9]+.4s 5
> >         PASS->FAIL: gcc.target/aarch64/vect_saddl_1.c scan-assembler-times 
> > ssubl\tv[0-9]+.2d, v[0-9]+.2s, v[0-9]+.2s 5
> >         PASS->FAIL: gcc.target/aarch64/vect_smlal_1.c scan-assembler-times 
> > smlsl2\tv[0-9]+.8h 5
> >         PASS->FAIL: gcc.target/aarch64/vect_smlal_1.c scan-assembler-times 
> > smlsl\tv[0-9]+.8h 5
> 
> Thanks, yes adding -fno-ipa-icf is a proper fix for tests like this.
> What happened was a logic bug in old implementation of merge routine.  When
> symbol is externally visible it decided to create a wrapper (to preserve
> potential address compares) and to avoid wrapper cost redirect all direct
> uses.

Hi Honza,

Thanks for the confirmation.

It took me a while longer than expected to get round to it, but
I've committed the attached (revision 221175) as the obvious fix, after
checking that it worked on aarch64-none-elf.

Thanks,
James

---
gcc/testsuite/

2015-03-04  James Greenhalgh  <james.greenha...@arm.com>

        * gcc.target/aarch64/atomic-comp-swap-release-acquire.c: Add
        -fno-ipa-icf to dg-options
        * gcc.target/aarch64/vect_saddl_1.c: Likewise.
        * gcc.target/aarch64/vect_smlal_1.c: Likewise.

Index: gcc/testsuite/ChangeLog
===================================================================
--- gcc/testsuite/ChangeLog	(revision 221174)
+++ gcc/testsuite/ChangeLog	(working copy)
@@ -1,3 +1,10 @@
+2015-03-04  James Greenhalgh  <james.greenha...@arm.com>
+
+	* gcc.target/aarch64/atomic-comp-swap-release-acquire.c: Add
+	-fno-ipa-icf to dg-options
+	* gcc.target/aarch64/vect_saddl_1.c: Likewise.
+	* gcc.target/aarch64/vect_smlal_1.c: Likewise.
+
 2015-03-04  Paolo Carlini  <paolo.carl...@oracle.com>
 
 	PR c++/64398
Index: gcc/testsuite/gcc.target/aarch64/atomic-comp-swap-release-acquire.c
===================================================================
--- gcc/testsuite/gcc.target/aarch64/atomic-comp-swap-release-acquire.c	(revision 221174)
+++ gcc/testsuite/gcc.target/aarch64/atomic-comp-swap-release-acquire.c	(working copy)
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-O2" } */
+/* { dg-options "-O2 -fno-ipa-icf" } */
 
 #include "atomic-comp-swap-release-acquire.x"
 
Index: gcc/testsuite/gcc.target/aarch64/vect_saddl_1.c
===================================================================
--- gcc/testsuite/gcc.target/aarch64/vect_saddl_1.c	(revision 221174)
+++ gcc/testsuite/gcc.target/aarch64/vect_saddl_1.c	(working copy)
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O3 -fno-inline -save-temps -fno-vect-cost-model" } */
+/* { dg-options "-O3 -fno-inline -save-temps -fno-vect-cost-model -fno-ipa-icf" } */
 
 typedef signed char S8_t;
 typedef signed short S16_t;
Index: gcc/testsuite/gcc.target/aarch64/vect_smlal_1.c
===================================================================
--- gcc/testsuite/gcc.target/aarch64/vect_smlal_1.c	(revision 221174)
+++ gcc/testsuite/gcc.target/aarch64/vect_smlal_1.c	(working copy)
@@ -1,5 +1,5 @@
 /* { dg-do run } */
-/* { dg-options "-O3 -fno-inline -save-temps -fno-vect-cost-model" } */
+/* { dg-options "-O3 -fno-inline -save-temps -fno-vect-cost-model -fno-ipa-icf" } */
 
 typedef signed char S8_t;
 typedef signed short S16_t;

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