On 17/02/15 06:18, Jeff Law wrote:
On 02/14/15 04:23, Maxim Kuvyrkov wrote:
FYI, (and not related to the core issue of this patch)
The use of mult vs shift by combine is a problem that Venkat is
working on, see "[RFC] Tighten memory type assumption in RTL combiner
pass" . The combiner uses MULTs instead of SHIFTs for rtx'es that
look like addresses, even when they are, in fact, mere
logic/arithmetic operations.
Right. I think I put that into my gcc-6 queue because we don't have a
regression that requires this problem be fixed.
If you've got a BZ that's regressing because of this issue, don't
hesitate to point it out and I'll move the thread into my gcc-5 queue.
Right, so I think I'll wait for GCC-6 when this work is done to try
implement these patterns with shifts.
This LRA patch breaks on aarch64 anyway.
Thanks,
Kyrill
jeff
