Hello,
The Cortex-A72 is an ARMv8 core with the same architectural features as
the Cortex-A57. This patch adds support for the command line option
-mcpu=cortex-a72 with the same effect as the -mcpu=cortex-a57 option,
only the name being different. It also adds support for the
-mcpu=cortex-a72.cortex-a53 big-little variant.
Tested with check-gcc on aarch64-none-linux-gnu with no new failures.
Tested the new cpu options from the command line.
Matthew
gcc/
2015-02-04 Matthew Wahab <matthew.wa...@arm.com>
* config/aarch64/aarch64-cores.def: Add cortex-a72 and
cortex-a72.cortex-a53.
* config/aarch64/aarch64-tune.md: Regenerate.
* doc/invoke.texi (AArch64 Options/-mtune): Add "cortex-a72".
diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def
index f978eb1..9b2eca2 100644
--- a/gcc/config/aarch64/aarch64-cores.def
+++ b/gcc/config/aarch64/aarch64-cores.def
@@ -36,9 +36,11 @@
AARCH64_CORE("cortex-a53", cortexa53, cortexa53, 8, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa53)
AARCH64_CORE("cortex-a57", cortexa57, cortexa57, 8, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57)
+AARCH64_CORE("cortex-a72", cortexa72, cortexa57, 8, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57)
AARCH64_CORE("thunderx", thunderx, thunderx, 8, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC | AARCH64_FL_CRYPTO, thunderx)
AARCH64_CORE("xgene1", xgene1, xgene1, 8, AARCH64_FL_FOR_ARCH8, xgene1)
/* V8 big.LITTLE implementations. */
AARCH64_CORE("cortex-a57.cortex-a53", cortexa57cortexa53, cortexa53, 8, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57)
+AARCH64_CORE("cortex-a72.cortex-a53", cortexa72cortexa53, cortexa53, 8, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa57)
diff --git a/gcc/config/aarch64/aarch64-tune.md b/gcc/config/aarch64/aarch64-tune.md
index 80f59c8..c3305f9 100644
--- a/gcc/config/aarch64/aarch64-tune.md
+++ b/gcc/config/aarch64/aarch64-tune.md
@@ -1,5 +1,5 @@
;; -*- buffer-read-only: t -*-
;; Generated automatically by gentune.sh from aarch64-cores.def
(define_attr "tune"
- "cortexa53,cortexa57,thunderx,xgene1,cortexa57cortexa53"
+ "cortexa53,cortexa57,cortexa72,thunderx,xgene1,cortexa57cortexa53,cortexa72cortexa53"
(const (symbol_ref "((enum attr_tune) aarch64_tune)")))
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 2d3c4f7..2d73006 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -12102,12 +12102,12 @@ architecture.
@opindex mtune
Specify the name of the target processor for which GCC should tune the
performance of the code. Permissible values for this option are:
-@samp{generic}, @samp{cortex-a53}, @samp{cortex-a57}, @samp{thunderx},
-@samp{xgene1}.
+@samp{generic}, @samp{cortex-a53}, @samp{cortex-a57},
+@samp{cortex-a72}, @samp{thunderx}, @samp{xgene1}.
Additionally, this option can specify that GCC should tune the performance
-of the code for a big.LITTLE system. The only permissible value is
-@samp{cortex-a57.cortex-a53}.
+of the code for a big.LITTLE system. Permissible values for this
+option are: @samp{cortex-a57.cortex-a53}, @samp{cortex-a72.cortex-a53}.
Where none of @option{-mtune=}, @option{-mcpu=} or @option{-march=}
are specified, the code is tuned to perform well across a range
