On 01/29/15 13:13, Segher Boessenkool wrote:
On Thu, Jan 29, 2015 at 07:30:31AM -0700, Jeff Law wrote:
@@ -2643,6 +2644,34 @@ try_combine (rtx_insn *i3, rtx_insn *i2, rtx_insn *i1,
rtx_insn *i0,
|| GET_CODE (src) == LSHIFTRT)
nshift++;
}
+
+ /* If I0 loads a memory and I3 sets the same memory, then I2 and I3
+ are likely manipulating its value. Ideally we'll be able to combine
+ all four insns into a bitfield insertion of some kind.
"I1 and I2"?
Very simple patch, nice :-)
Thanks. Fixed in the obvious way.
I'm also looking at 15596 which is in the same area that affects PPC. I
haven't come up with anything good for that one yet. But it feels like
it ought to have a similar flow (make_field_assignment creates some
interesting RTL, we choose an appropriate split point and the right
things should just happen).
Jeff
