On 12/10/14 06:47, Segher Boessenkool wrote:
On Tue, Dec 09, 2014 at 12:15:30PM -0700, Jeff Law wrote:
@@ -3323,7 +3396,11 @@ try_combine (rtx_insn *i3, rtx_insn *i2, rtx_insn
*i1, rtx_insn *i0,
rtx old = newpat;
total_sets = 1 + extra_sets;
newpat = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (total_sets));
- XVECEXP (newpat, 0, 0) = old;
+
+ if (to_combined_insn)
+ XVECEXP (newpat, 0, --total_sets) = old;
+ else
+ XVECEXP (newpat, 0, 0) = old;
}
Is this correct? If so, it needs a big fat comment, because it is
not exactly obvious :-)
Also, it doesn't handle at all the case where the new pattern already is
a PARALLEL; can that never happen?
I'd convinced myself it was. But yes, a comment here would be good.
Presumably you're thinking about a PARALLEL that satisfies single_set_p?
I wasn't thinking about anything in particular; this code does not handle
a PARALLEL newpat with to_combined_insn correctly, and it doesn't say it
cannot happen.
It situations like this where I really need to just put the damn patch
into my tree and fire up the debugger and poke at it for a while.
Regardless, I got mail from Zhenqiang that he left ARM at the start of
the year for other opportunities and won't be doing GCC work.
My initial thought is to attach his work to date to the BZ, we can use
it as a starting point if we want to pursue this missed optimization
further (it's a regression and thus suitable for stage4 if we're so
inclined).
Thoughts?
jeff
