On 12/17/2014 03:18 PM, Sandra Loosemore wrote:
On 11/14/2014 05:46 PM, Sandra Loosemore wrote:2014-11-14 Sandra Loosemore <san...@codesourcery.com> Joshua Conner <jcon...@nvidia.com> Chris Jones <chr...@nvidia.com> gcc/ * doc/invoke.texi (Option Summary): Add -malign-saved-fp-regs. (ARM options): Document it. * config/arm/arm.h (arm_stack_offsets): Add fp_regs_padding field. * config/arm/arm.opt (malign-saved-fp-regs): New option. * config/arm/arm.c (add_dummy_register_save_p): New function, split from... (arm_get_frame_offsets): Here. Use this logic also for aligning saved VFP coprocessor registers if possible. (arm_expand_prologue): Add explicit padding for saved VFP registers. (arm_expand_epilogue): Undo explicit padding for saved VFP registers.Ping? https://gcc.gnu.org/ml/gcc-patches/2014-11/msg01914.html
Ping again? This patch was posted during stage 1; can somebody review this before Stage 4 starts and it's too late to get it in GCC 5?
-Sandra
