On Thu, Jun 16, 2011 at 05:57:12PM -0500, Quentin Neill wrote:
> Does it need to also handle the VCVTP[SH]2P[HS] insns like this?
> 
> diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
> index 675888f..584f722 100644
> --- a/gcc/config/i386/i386.c
> +++ b/gcc/config/i386/i386.c
> @@ -25571,6 +25571,10 @@ ix86_expand_multi_arg_builtin (enum insn_code
> icode, tree exp, rtx target,
>                 case CODE_FOR_xop_vpermil2v4sf3:
>                 case CODE_FOR_xop_vpermil2v4df3:
>                 case CODE_FOR_xop_vpermil2v8sf3:
> +               case CODE_FOR_vcvtph2ps:
> +               case CODE_FOR_vcvtph2ps256:
> +               case CODE_FOR_vcvtps2ph:
> +               case CODE_FOR_vcvtps2ph256:
>                   if (!CONST_INT_P (op))
>                     {
>                       error ("last argument must be an immediate");

Not here, those are handled by  ix86_expand_args_builtin
instead of ix86_expand_multi_arg_builtin.  Furthermore, only
CODE_FOR_vcvtps2ph and CODE_FOR_vcvtps2ph256 have CONST_INT argument.
And I believe ix86_expand_args_builtin handles it fine, what's wrong
is the actual predicates those insns use.

E.g.
#include <x86intrin.h>
__m128i a;
__m128 b;
void
foo (int i)
{
  a = _mm_cvtps_ph (b, 256);
//  a = _mm_cvtps_ph (b, i);
}
ICEs during reload.  I don't see how reload could ever fix up
if there is an CONST_INT operand which isn't from 0..255 range
to make that operand in range.  When the operand is non-constant,
ix86_expand_args_builtin correctly errors out that the
operand must be an 8-bit immediate.

So something like untested:

2011-06-17  Jakub Jelinek  <ja...@redhat.com>

        * config/i386/sse.md (vcvtps2ph, *vcvtps2ph, *vcvtps2ph_store,
        vcvtps2ph256): Use const_0_to_255_operand predicate instead of
        immediate_operand.

--- gcc/config/i386/sse.md      2011-06-06 10:24:40.000000000 +0200
+++ gcc/config/i386/sse.md      2011-06-17 01:19:45.371681174 +0200
@@ -10290,7 +10290,7 @@
   [(set (match_operand:V8HI 0 "register_operand" "")
        (vec_concat:V8HI
          (unspec:V4HI [(match_operand:V4SF 1 "register_operand" "")
-                       (match_operand:SI 2 "immediate_operand" "")]
+                       (match_operand:SI 2 "const_0_to_255_operand" "")]
                       UNSPEC_VCVTPS2PH)
          (match_dup 3)))]
   "TARGET_F16C"
@@ -10300,7 +10300,7 @@
   [(set (match_operand:V8HI 0 "register_operand" "=x")
        (vec_concat:V8HI
          (unspec:V4HI [(match_operand:V4SF 1 "register_operand" "x")
-                       (match_operand:SI 2 "immediate_operand" "N")]
+                       (match_operand:SI 2 "const_0_to_255_operand" "N")]
                       UNSPEC_VCVTPS2PH)
          (match_operand:V4HI 3 "const0_operand" "")))]
   "TARGET_F16C"
@@ -10312,7 +10312,7 @@
 (define_insn "*vcvtps2ph_store"
   [(set (match_operand:V4HI 0 "memory_operand" "=m")
        (unspec:V4HI [(match_operand:V4SF 1 "register_operand" "x")
-                     (match_operand:SI 2 "immediate_operand" "N")]
+                     (match_operand:SI 2 "const_0_to_255_operand" "N")]
                     UNSPEC_VCVTPS2PH))]
   "TARGET_F16C"
   "vcvtps2ph\t{%2, %1, %0|%0, %1, %2}"
@@ -10323,7 +10323,7 @@
 (define_insn "vcvtps2ph256"
   [(set (match_operand:V8HI 0 "nonimmediate_operand" "=xm")
        (unspec:V8HI [(match_operand:V8SF 1 "register_operand" "x")
-                     (match_operand:SI 2 "immediate_operand" "N")]
+                     (match_operand:SI 2 "const_0_to_255_operand" "N")]
                     UNSPEC_VCVTPS2PH))]
   "TARGET_F16C"
   "vcvtps2ph\t{%2, %1, %0|%0, %1, %2}"


        Jakub

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