On Thu, 26 May 2011, Vladimir Makarov wrote: > On 05/26/2011 04:47 AM, Hans-Peter Nilsson wrote: > > On Wed, 25 May 2011, Vladimir Makarov wrote: > > It sounds like you're saying that "the narrowest register > > classes must be formed of registers for which there are trivial > > instructions to move between registers inside the class"? > > > No it is wrong. For example, SPARC FPCC (floating point control code > registers) should form a uniform class but there are no trvial insns to move > between registers inside the class.
I see. > I'll think how to formulate the requirement but it will be really not easy. I'd be very thankful but moreover we don't have to inspect the source and guess and maybe ultimately ask you why the abort triggered "every time" there's a new port or someone changes the register classes in their port. :) > > I think that'd be reasonable and if you agree I'll do the > > update. > > > > In either case, your patch wouldn't be complete as more changes > > are needed, for example for secondary reloads the new SRP_REGS > > has to be considered. > I've checked CC0 and it is not fixed. If I make it fixed, I have pressure > classes SPECIAL_REGS and GENERAL_REGS and the assertion is ok. But you need > another patch for PR49154, the one I sent to fix SPARC. Oops, it should be, at least until the CRIS port is de-CC0:ed. I'll fix that. Still, I think I'll have a look why SRP was "forgotten". Good, a way forward (well, for me) even though the cure is suspiciously incidental. Thanks for your patience. brgds, H-P
