Hi,
the attached patch fixes a testsuite failure with -m31 -mzarch. The
TD/TF mem to reg move splitter uses the first word mode register of
the target operand as temporary register for storing the address.
This generates an invalid address when having a 64 bit word mode and a
32 bit address mode as it happens with -m31 -mzarch.
Fixed with the attached patch.
Bootstrapped and regtested with -with-mode=zarch.
Applied to mainline and 4.6.
Bye,
-Andreas-
2011-05-09 Andreas Krebbel <andreas.kreb...@de.ibm.com>
* config/s390/s390.md (TD/TF mem to reg move splitter): Make the
temporary register to match Pmode.
Index: gcc/config/s390/s390.md
===================================================================
--- gcc/config/s390/s390.md.orig
+++ gcc/config/s390/s390.md
@@ -2026,6 +2026,7 @@
[(set (match_dup 0) (match_dup 1))]
{
rtx addr = operand_subword (operands[0], 1, 0, <MODE>mode);
+ addr = gen_lowpart (Pmode, addr);
s390_load_address (addr, XEXP (operands[1], 0));
operands[1] = replace_equiv_address (operands[1], addr);
})
