ping
The attached patch adds support for silicon revision 0.4 of the bf54x family.
2011-02-17 Mike Frysinger <michael.frysin...@analog.com>
* gcc.target/bfin/mcpu-bf542.c: Check SILICON_REVISION is 0x0004.
* gcc.target/bfin/mcpu-bf544.c, gcc.target/bfin/mcpu-bf547.c,
gcc.target/bfin/mcpu-bf548.c, gcc.target/bfin/mcpu-bf549.c: Likewise.
2011-02-17 Mike Frysinger <michael.frysin...@analog.com>
* config/bfin/bfin.c (bfin_cpus[]): Add 0.4 for
bf542/bf544/bf547/bf548/bf549.
Thanks,
Stu
Index: gcc/testsuite/gcc.target/bfin/mcpu-bf542.c
===================================================================
--- gcc/testsuite/gcc.target/bfin/mcpu-bf542.c (revision 5257)
+++ gcc/testsuite/gcc.target/bfin/mcpu-bf542.c (revision 5258)
@@ -10,8 +10,8 @@
#error "__ADSPBF54x__ is not defined"
#endif
-#if __SILICON_REVISION__ != 0x0002
-#error "__SILICON_REVISION__ is not 0x0002"
+#if __SILICON_REVISION__ != 0x0004
+#error "__SILICON_REVISION__ is not 0x0004"
#endif
#ifndef __WORKAROUNDS_ENABLED
Index: gcc/testsuite/gcc.target/bfin/mcpu-bf544.c
===================================================================
--- gcc/testsuite/gcc.target/bfin/mcpu-bf544.c (revision 5257)
+++ gcc/testsuite/gcc.target/bfin/mcpu-bf544.c (revision 5258)
@@ -10,8 +10,8 @@
#error "__ADSPBF54x__ is not defined"
#endif
-#if __SILICON_REVISION__ != 0x0002
-#error "__SILICON_REVISION__ is not 0x0002"
+#if __SILICON_REVISION__ != 0x0004
+#error "__SILICON_REVISION__ is not 0x0004"
#endif
#ifndef __WORKAROUNDS_ENABLED
Index: gcc/testsuite/gcc.target/bfin/mcpu-bf547.c
===================================================================
--- gcc/testsuite/gcc.target/bfin/mcpu-bf547.c (revision 5257)
+++ gcc/testsuite/gcc.target/bfin/mcpu-bf547.c (revision 5258)
@@ -10,8 +10,8 @@
#error "__ADSPBF54x__ is not defined"
#endif
-#if __SILICON_REVISION__ != 0x0002
-#error "__SILICON_REVISION__ is not 0x0002"
+#if __SILICON_REVISION__ != 0x0004
+#error "__SILICON_REVISION__ is not 0x0004"
#endif
#ifndef __WORKAROUNDS_ENABLED
Index: gcc/testsuite/gcc.target/bfin/mcpu-bf548.c
===================================================================
--- gcc/testsuite/gcc.target/bfin/mcpu-bf548.c (revision 5257)
+++ gcc/testsuite/gcc.target/bfin/mcpu-bf548.c (revision 5258)
@@ -10,8 +10,8 @@
#error "__ADSPBF54x__ is not defined"
#endif
-#if __SILICON_REVISION__ != 0x0002
-#error "__SILICON_REVISION__ is not 0x0002"
+#if __SILICON_REVISION__ != 0x0004
+#error "__SILICON_REVISION__ is not 0x0004"
#endif
#ifndef __WORKAROUNDS_ENABLED
Index: gcc/testsuite/gcc.target/bfin/mcpu-bf549.c
===================================================================
--- gcc/testsuite/gcc.target/bfin/mcpu-bf549.c (revision 5257)
+++ gcc/testsuite/gcc.target/bfin/mcpu-bf549.c (revision 5258)
@@ -10,8 +10,8 @@
#error "__ADSPBF54x__ is not defined"
#endif
-#if __SILICON_REVISION__ != 0x0002
-#error "__SILICON_REVISION__ is not 0x0002"
+#if __SILICON_REVISION__ != 0x0004
+#error "__SILICON_REVISION__ is not 0x0004"
#endif
#ifndef __WORKAROUNDS_ENABLED
Index: gcc/config/bfin/bfin.c
===================================================================
--- gcc/config/bfin/bfin.c (revision 5257)
+++ gcc/config/bfin/bfin.c (revision 5258)
@@ -300,6 +300,8 @@
{"bf542m", BFIN_CPU_BF542M, 0x0003,
WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS | WA_05000074},
+ {"bf542", BFIN_CPU_BF542, 0x0004,
+ WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS | WA_05000074},
{"bf542", BFIN_CPU_BF542, 0x0002,
WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS | WA_05000074},
{"bf542", BFIN_CPU_BF542, 0x0001,
@@ -311,6 +313,8 @@
{"bf544m", BFIN_CPU_BF544M, 0x0003,
WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS | WA_05000074},
+ {"bf544", BFIN_CPU_BF544, 0x0004,
+ WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS | WA_05000074},
{"bf544", BFIN_CPU_BF544, 0x0002,
WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS | WA_05000074},
{"bf544", BFIN_CPU_BF544, 0x0001,
@@ -322,6 +326,8 @@
{"bf547m", BFIN_CPU_BF547M, 0x0003,
WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS | WA_05000074},
+ {"bf547", BFIN_CPU_BF547, 0x0004,
+ WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS | WA_05000074},
{"bf547", BFIN_CPU_BF547, 0x0002,
WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS | WA_05000074},
{"bf547", BFIN_CPU_BF547, 0x0001,
@@ -333,6 +339,8 @@
{"bf548m", BFIN_CPU_BF548M, 0x0003,
WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS | WA_05000074},
+ {"bf548", BFIN_CPU_BF548, 0x0004,
+ WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS | WA_05000074},
{"bf548", BFIN_CPU_BF548, 0x0002,
WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS | WA_05000074},
{"bf548", BFIN_CPU_BF548, 0x0001,
@@ -344,6 +352,8 @@
{"bf549m", BFIN_CPU_BF549M, 0x0003,
WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS | WA_05000074},
+ {"bf549", BFIN_CPU_BF549, 0x0004,
+ WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS | WA_05000074},
{"bf549", BFIN_CPU_BF549, 0x0002,
WA_SPECULATIVE_LOADS | WA_INDIRECT_CALLS | WA_05000074},
{"bf549", BFIN_CPU_BF549, 0x0001,
