2011/4/19 Georg-Johann Lay <a...@gjlay.de>: > Denis Chertykov schrieb: >> 2011/4/19 Georg-Johann Lay <a...@gjlay.de>: >>> How can add, sub etc. be split? This would need an explicit >>> representation of carry. >> >> Yes. >> >> Look at http://gcc.gnu.org/ml/gcc/2005-03/msg00871.html > > Just skimmed the conversation. I thought about making AVR ISA's > effects on SREG explicit several times, but I always got stuck at some > point. > > - It's not only about scheduling (which does not happen for avr) but > also about moving instructions across jumps. > > - Many transformations would happen before reload, but at these stages > the effect on SREG is not yet known in many cases. There is > sophisticated instruction output for many patterns, and their impact > on SREG/CC is not known before reload. > > - Making CC explicit would render many single_set insns to PARALLELs > making the optimizers' live much harder or impossible. Imagine > instructions that could be combined. Explicit CC would clutter up > insns and combine won't try to transform the bulky patterns. > > - Backend would be much more complicated, harder to maintain and > understand. Almost any insn would have to be changed.
Generally, I'm agree with you, the AVR port uses CC0 because of that. Denis.
