Hi, On Wed, 30 Mar 2011, Aldy Hernandez wrote:
> > > The memory model is not implementable on strict-alignment targets > > that do not have a byte store operation. But we previously said that ;) > > Yes. I think we should issue an error when we have such a target and the user > tries -fmemory-model=c++0x. However, how many strict-alignment targets are > not byte addressable nowadays? Consider cache aliasing, where the unit of coherence (absent using atomic instructions) is for instance 64 bytes. I'm not sure how the mem-model could be implemented without generally falling back to atomics. Or CPU internal write buffers that could (again if there are just normal writes, not atomics) reorder or merge write requests. I think also that would destroy guarantees that the cxx-mem-model tries to provide. Ciao, Michael.
