After the fix for 48053 was installed, we discovered that if reload wanted to load a 0 into a VSX register, it would fail on 32-bit. This is due to the fact that a define_split was trying to break the load into 2 separate GPR registers, but in this case there is only a single VSX register.
I bootstrapped the compiler with the patch and ran make check with no regressions before committing the change. 2011-03-14 Michael Meissner <[email protected]> * config/rs6000/rs6000.md (movdi split for 32-bit): Don't split up 64-bit constants being loaded into registers other than GPRs such as loading 0 into a VSX register. Index: gcc/config/rs6000/rs6000.md =================================================================== --- gcc/config/rs6000/rs6000.md (revision 170943) +++ gcc/config/rs6000/rs6000.md (working copy) @@ -10071,7 +10071,8 @@ (define_insn "*movdi_internal32" (define_split [(set (match_operand:DI 0 "gpc_reg_operand" "") (match_operand:DI 1 "const_int_operand" ""))] - "! TARGET_POWERPC64 && reload_completed" + "! TARGET_POWERPC64 && reload_completed + && gpr_or_gpr_p (operands[0], operands[1])" [(set (match_dup 2) (match_dup 4)) (set (match_dup 3) (match_dup 1))] " -- Michael Meissner, IBM 5 Technology Place Drive, M/S 2757, Westford, MA 01886-3141, USA [email protected] fax +1 (978) 399-6899
