On Mon, 2011-02-28 at 23:40 +0800, Chung-Lin Tang wrote:
> On 2011/2/28 11:07 PM, Richard Earnshaw wrote:
> >
> > On Mon, 2011-02-07 at 14:09 +0800, Chung-Lin Tang wrote:
> >> Hi,
> >> the *arm_zero_extendhisi2[_v6] patterns currently do not have the
> >> constant pool range attributes specified, causing a minipool ICE case.
> >> This patch adds the needed pool_range/neg_pool_range settings.
> >>
> >> Reported originally from https://bugs.launchpad.net/bugs/711819 , also
> >> happens to occur when building ffmpeg svn trunk.
> >>
> >> Ok for trunk?
> >>
> >> Thanks,
> >> Chung-Lin
> >>
> >> 2011-02-07 Chung-Lin Tang <clt...@codesourcery.com>
> >>
> >> * config/arm/arm.md (*arm_zero_extendhisi2): Set pool_range,
> >> neg_pool_range attributes for ldrh alternative.
> >> (*arm_zero_extendhisi2_v6): Same.
> >
> > This is wrong. Neither the predicate nor the constraint accept an
> > immediate, so these should never need to generate mini-pool entries. If
> > reload is letting these through, then that's a bug in reload IMO. If
> > it's not reload, then that needs investigating further too.
>
> Hi Richard,
>
> To re-cap some of the discussion Bernd, Ramana, and I had off-list: we
> are seeing in some cases, IRA/reload ending up with insns with constant
> pool references (not generated from ARM reorg):
> (insn 262 92 94 3 (set (reg:HI 4 r4 [orig:328 iftmp.6 ] [328])
> (mem/u/c/i:HI (symbol_ref/u:SI ("*.LC0") [flags 0x2]) [2 S2
> A16])) k.c:11 177 {*movhi_insn_arch4}
> (expr_list:REG_EQUAL (const_int 2047 [0x7ff])
> (nil)))
>
Thanks for the testcase. It looks like the problems all started when
the insn above was created. Reload shouldn't have done that, but was
forced to because the constant being spilt wasn't valid in the
arm_movhi_arch4 pattern. Once that is done we start down the slippery
slope that leads to the ICE.
It's easily fixed by making that pattern accept any constant and then
processing that directly into the minipools rather than letting reload
push it in to the per-function constant pool and then trying to
eliminate that.
We should do more to optimize handling of constants in HImode,
particularly when we have MOVW available. But for now this patch will
solve the ICE.
2011-03-05 Richard Earnshaw <rearn...@arm.com>
PR target/47719
* arm.md (movhi_insn_arch4): Accept any immediate constant.
*** config/arm/arm.md (revision 170711)
--- config/arm/arm.md (local)
*************** (define_expand "movhi_bigend"
*** 5790,5801 ****
;; Pattern to recognize insn generated default case above
(define_insn "*movhi_insn_arch4"
[(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,m,r")
! (match_operand:HI 1 "general_operand" "rI,K,r,m"))]
"TARGET_ARM
&& arm_arch4
! && (GET_CODE (operands[1]) != CONST_INT
! || const_ok_for_arm (INTVAL (operands[1]))
! || const_ok_for_arm (~INTVAL (operands[1])))"
"@
mov%?\\t%0, %1\\t%@ movhi
mvn%?\\t%0, #%B1\\t%@ movhi
--- 5790,5800 ----
;; Pattern to recognize insn generated default case above
(define_insn "*movhi_insn_arch4"
[(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,m,r")
! (match_operand:HI 1 "general_operand" "rI,K,r,mi"))]
"TARGET_ARM
&& arm_arch4
! && (register_operand (operands[0], HImode)
! || register_operand (operands[1], HImode))"
"@
mov%?\\t%0, %1\\t%@ movhi
mvn%?\\t%0, #%B1\\t%@ movhi
