https://gcc.gnu.org/g:df28d04aa00224116c23c8ba4f2b43350532de68
commit r17-2459-gdf28d04aa00224116c23c8ba4f2b43350532de68 Author: Pan Li <[email protected]> Date: Wed Jul 15 09:20:10 2026 +0800 RISC-V: Add test cases for vwcvt.x.x.v reg overlap Add test cases for vwcvt.x.x.v register group overlap, please note it is not overlap as much as possible. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i16-m1.c: New test. * gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i16-m2.c: New test. * gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i16-m4.c: New test. * gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i16-mf2.c: New test. * gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i16-mf4.c: New test. * gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i32-m1.c: New test. * gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i32-m2.c: New test. * gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i32-m4.c: New test. * gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i32-mf2.c: New test. * gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i8-m1.c: New test. * gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i8-m2.c: New test. * gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i8-m4.c: New test. * gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i8-mf2.c: New test. * gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i8-mf4.c: New test. * gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i8-mf8.c: New test. Signed-off-by: Pan Li <[email protected]> Diff: --- .../riscv/rvv/autovec/group_overlap/vwcvt-i16-m1.c | 17 ++++++++++++ .../riscv/rvv/autovec/group_overlap/vwcvt-i16-m2.c | 17 ++++++++++++ .../riscv/rvv/autovec/group_overlap/vwcvt-i16-m4.c | 17 ++++++++++++ .../rvv/autovec/group_overlap/vwcvt-i16-mf2.c | 31 ++++++++++++++++++++++ .../rvv/autovec/group_overlap/vwcvt-i16-mf4.c | 31 ++++++++++++++++++++++ .../riscv/rvv/autovec/group_overlap/vwcvt-i32-m1.c | 17 ++++++++++++ .../riscv/rvv/autovec/group_overlap/vwcvt-i32-m2.c | 17 ++++++++++++ .../riscv/rvv/autovec/group_overlap/vwcvt-i32-m4.c | 17 ++++++++++++ .../rvv/autovec/group_overlap/vwcvt-i32-mf2.c | 31 ++++++++++++++++++++++ .../riscv/rvv/autovec/group_overlap/vwcvt-i8-m1.c | 17 ++++++++++++ .../riscv/rvv/autovec/group_overlap/vwcvt-i8-m2.c | 17 ++++++++++++ .../riscv/rvv/autovec/group_overlap/vwcvt-i8-m4.c | 17 ++++++++++++ .../riscv/rvv/autovec/group_overlap/vwcvt-i8-mf2.c | 31 ++++++++++++++++++++++ .../riscv/rvv/autovec/group_overlap/vwcvt-i8-mf4.c | 31 ++++++++++++++++++++++ .../riscv/rvv/autovec/group_overlap/vwcvt-i8-mf8.c | 31 ++++++++++++++++++++++ 15 files changed, 339 insertions(+) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i16-m1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i16-m1.c new file mode 100644 index 000000000000..9d646de7eb08 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i16-m1.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ + +#include "group_overlap.h" + +DEF_GROUP_OVERLAP_UNARY_0( + __riscv_vsetvlmax_e16m1, + vint16m1_t, + vint32m2_t, + __riscv_vle16_v_i16m1, + __riscv_vwcvt_x_x_v_i32m2, + __riscv_vse32_v_i32m2, + vwcvt, + LOOP_UNARY_BODY_X16) + +/* { dg-final { scan-assembler-times {vwcvt\.x\.x\.v\s+v0,v1([^0-9]|$)} 1 } } */ +/* { dg-final { scan-assembler-times {vwcvt\.x\.x\.v\s+v2,v3([^0-9]|$)} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i16-m2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i16-m2.c new file mode 100644 index 000000000000..8480afc6e5dc --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i16-m2.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ + +#include "group_overlap.h" + +DEF_GROUP_OVERLAP_UNARY_0( + __riscv_vsetvlmax_e16m2, + vint16m2_t, + vint32m4_t, + __riscv_vle16_v_i16m2, + __riscv_vwcvt_x_x_v_i32m4, + __riscv_vse32_v_i32m4, + vwcvt, + LOOP_UNARY_BODY_X8) + +/* { dg-final { scan-assembler-times {vwcvt\.x\.x\.v\s+v0,v2([^0-9]|$)} 1 } } */ +/* { dg-final { scan-assembler-times {vwcvt\.x\.x\.v\s+v4,v6} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i16-m4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i16-m4.c new file mode 100644 index 000000000000..0dc402c3c6a4 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i16-m4.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ + +#include "group_overlap.h" + +DEF_GROUP_OVERLAP_UNARY_0( + __riscv_vsetvlmax_e16m4, + vint16m4_t, + vint32m8_t, + __riscv_vle16_v_i16m4, + __riscv_vwcvt_x_x_v_i32m8, + __riscv_vse32_v_i32m8, + vwcvt, + LOOP_UNARY_BODY_X4) + +/* { dg-final { scan-assembler-times {vwcvt\.x\.x\.v\s+v0,v4} 1 } } */ +/* { dg-final { scan-assembler-times {vwcvt\.x\.x\.v\s+v8,v12} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i16-mf2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i16-mf2.c new file mode 100644 index 000000000000..ef03a59458c4 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i16-mf2.c @@ -0,0 +1,31 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ + +#include "group_overlap.h" + +DEF_GROUP_OVERLAP_UNARY_0( + __riscv_vsetvlmax_e16m1, + vint16mf2_t, + vint32m1_t, + __riscv_vle16_v_i16mf2, + __riscv_vwcvt_x_x_v_i32m1, + __riscv_vse32_v_i32m1, + vwcvt, + LOOP_UNARY_BODY_X16) + +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v0,v1([^0-9]|$)} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v2,v3([^0-9]|$)} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v4,v5} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v6,v7} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v8,v9} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v10,v11} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v12,v13} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v14,v15} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v16,v17} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v18,v19} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v20,v21} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v22,v23} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v24,v25} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v26,v27} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v28,v29} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v30,v31} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i16-mf4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i16-mf4.c new file mode 100644 index 000000000000..72927d6d5d8f --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i16-mf4.c @@ -0,0 +1,31 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ + +#include "group_overlap.h" + +DEF_GROUP_OVERLAP_UNARY_0( + __riscv_vsetvlmax_e16m1, + vint16mf4_t, + vint32mf2_t, + __riscv_vle16_v_i16mf4, + __riscv_vwcvt_x_x_v_i32mf2, + __riscv_vse32_v_i32mf2, + vwcvt, + LOOP_UNARY_BODY_X16) + +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v0,v1([^0-9]|$)} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v2,v3([^0-9]|$)} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v4,v5} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v6,v7} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v8,v9} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v10,v11} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v12,v13} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v14,v15} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v16,v17} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v18,v19} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v20,v21} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v22,v23} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v24,v25} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v26,v27} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v28,v29} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v30,v31} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i32-m1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i32-m1.c new file mode 100644 index 000000000000..e1dd48da8770 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i32-m1.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ + +#include "group_overlap.h" + +DEF_GROUP_OVERLAP_UNARY_0( + __riscv_vsetvlmax_e32m1, + vint32m1_t, + vint64m2_t, + __riscv_vle32_v_i32m1, + __riscv_vwcvt_x_x_v_i64m2, + __riscv_vse64_v_i64m2, + vwcvt, + LOOP_UNARY_BODY_X16) + +/* { dg-final { scan-assembler-times {vwcvt\.x\.x\.v\s+v0,v1([^0-9]|$)} 1 } } */ +/* { dg-final { scan-assembler-times {vwcvt\.x\.x\.v\s+v2,v3([^0-9]|$)} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i32-m2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i32-m2.c new file mode 100644 index 000000000000..73958ef11f6b --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i32-m2.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ + +#include "group_overlap.h" + +DEF_GROUP_OVERLAP_UNARY_0( + __riscv_vsetvlmax_e32m2, + vint32m2_t, + vint64m4_t, + __riscv_vle32_v_i32m2, + __riscv_vwcvt_x_x_v_i64m4, + __riscv_vse64_v_i64m4, + vwcvt, + LOOP_UNARY_BODY_X8) + +/* { dg-final { scan-assembler-times {vwcvt\.x\.x\.v\s+v0,v2([^0-9]|$)} 1 } } */ +/* { dg-final { scan-assembler-times {vwcvt\.x\.x\.v\s+v4,v6} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i32-m4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i32-m4.c new file mode 100644 index 000000000000..0fd0fc1b62b2 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i32-m4.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ + +#include "group_overlap.h" + +DEF_GROUP_OVERLAP_UNARY_0( + __riscv_vsetvlmax_e32m4, + vint32m4_t, + vint64m8_t, + __riscv_vle32_v_i32m4, + __riscv_vwcvt_x_x_v_i64m8, + __riscv_vse64_v_i64m8, + vwcvt, + LOOP_UNARY_BODY_X4) + +/* { dg-final { scan-assembler-times {vwcvt\.x\.x\.v\s+v0,v4} 1 } } */ +/* { dg-final { scan-assembler-times {vwcvt\.x\.x\.v\s+v8,v12} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i32-mf2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i32-mf2.c new file mode 100644 index 000000000000..752065e4b6de --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i32-mf2.c @@ -0,0 +1,31 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ + +#include "group_overlap.h" + +DEF_GROUP_OVERLAP_UNARY_0( + __riscv_vsetvlmax_e32m1, + vint32mf2_t, + vint64m1_t, + __riscv_vle32_v_i32mf2, + __riscv_vwcvt_x_x_v_i64m1, + __riscv_vse64_v_i64m1, + vwcvt, + LOOP_UNARY_BODY_X16) + +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v0,v1([^0-9]|$)} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v2,v3([^0-9]|$)} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v4,v5} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v6,v7} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v8,v9} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v10,v11} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v12,v13} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v14,v15} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v16,v17} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v18,v19} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v20,v21} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v22,v23} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v24,v25} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v26,v27} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v28,v29} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v30,v31} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i8-m1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i8-m1.c new file mode 100644 index 000000000000..107e0cf49f5a --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i8-m1.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ + +#include "group_overlap.h" + +DEF_GROUP_OVERLAP_UNARY_0( + __riscv_vsetvlmax_e8m1, + vint8m1_t, + vint16m2_t, + __riscv_vle8_v_i8m1, + __riscv_vwcvt_x_x_v_i16m2, + __riscv_vse16_v_i16m2, + vwcvt, + LOOP_UNARY_BODY_X16) + +/* { dg-final { scan-assembler-times {vwcvt\.x\.x\.v\s+v0,v1([^0-9]|$)} 1 } } */ +/* { dg-final { scan-assembler-times {vwcvt\.x\.x\.v\s+v2,v3([^0-9]|$)} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i8-m2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i8-m2.c new file mode 100644 index 000000000000..664f305b8cbc --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i8-m2.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ + +#include "group_overlap.h" + +DEF_GROUP_OVERLAP_UNARY_0( + __riscv_vsetvlmax_e8m2, + vint8m2_t, + vint16m4_t, + __riscv_vle8_v_i8m2, + __riscv_vwcvt_x_x_v_i16m4, + __riscv_vse16_v_i16m4, + vwcvt, + LOOP_UNARY_BODY_X8) + +/* { dg-final { scan-assembler-times {vwcvt\.x\.x\.v\s+v0,v2([^0-9]|$)} 1 } } */ +/* { dg-final { scan-assembler-times {vwcvt\.x\.x\.v\s+v4,v6} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i8-m4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i8-m4.c new file mode 100644 index 000000000000..6783f4c54042 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i8-m4.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ + +#include "group_overlap.h" + +DEF_GROUP_OVERLAP_UNARY_0( + __riscv_vsetvlmax_e8m4, + vint8m4_t, + vint16m8_t, + __riscv_vle8_v_i8m4, + __riscv_vwcvt_x_x_v_i16m8, + __riscv_vse16_v_i16m8, + vwcvt, + LOOP_UNARY_BODY_X4) + +/* { dg-final { scan-assembler-times {vwcvt\.x\.x\.v\s+v0,v4} 1 } } */ +/* { dg-final { scan-assembler-times {vwcvt\.x\.x\.v\s+v8,v12} 1 } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i8-mf2.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i8-mf2.c new file mode 100644 index 000000000000..21be67818c6e --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i8-mf2.c @@ -0,0 +1,31 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ + +#include "group_overlap.h" + +DEF_GROUP_OVERLAP_UNARY_0( + __riscv_vsetvlmax_e8m1, + vint8mf2_t, + vint16m1_t, + __riscv_vle8_v_i8mf2, + __riscv_vwcvt_x_x_v_i16m1, + __riscv_vse16_v_i16m1, + vwcvt, + LOOP_UNARY_BODY_X16) + +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v0,v1([^0-9]|$)} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v2,v3([^0-9]|$)} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v4,v5} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v6,v7} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v8,v9} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v10,v11} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v12,v13} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v14,v15} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v16,v17} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v18,v19} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v20,v21} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v22,v23} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v24,v25} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v26,v27} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v28,v29} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v30,v31} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i8-mf4.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i8-mf4.c new file mode 100644 index 000000000000..28c6dc6a9ae9 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i8-mf4.c @@ -0,0 +1,31 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ + +#include "group_overlap.h" + +DEF_GROUP_OVERLAP_UNARY_0( + __riscv_vsetvlmax_e8m1, + vint8mf4_t, + vint16mf2_t, + __riscv_vle8_v_i8mf4, + __riscv_vwcvt_x_x_v_i16mf2, + __riscv_vse16_v_i16mf2, + vwcvt, + LOOP_UNARY_BODY_X16) + +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v0,v1([^0-9]|$)} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v2,v3([^0-9]|$)} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v4,v5} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v6,v7} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v8,v9} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v10,v11} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v12,v13} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v14,v15} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v16,v17} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v18,v19} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v20,v21} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v22,v23} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v24,v25} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v26,v27} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v28,v29} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v30,v31} } } */ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i8-mf8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i8-mf8.c new file mode 100644 index 000000000000..38e04f846db6 --- /dev/null +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/group_overlap/vwcvt-i8-mf8.c @@ -0,0 +1,31 @@ +/* { dg-do compile } */ +/* { dg-options "-march=rv64gcv -mabi=lp64d" } */ + +#include "group_overlap.h" + +DEF_GROUP_OVERLAP_UNARY_0( + __riscv_vsetvlmax_e8m1, + vint8mf8_t, + vint16mf4_t, + __riscv_vle8_v_i8mf8, + __riscv_vwcvt_x_x_v_i16mf4, + __riscv_vse16_v_i16mf4, + vwcvt, + LOOP_UNARY_BODY_X16) + +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v0,v1([^0-9]|$)} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v2,v3([^0-9]|$)} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v4,v5} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v6,v7} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v8,v9} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v10,v11} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v12,v13} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v14,v15} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v16,v17} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v18,v19} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v20,v21} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v22,v23} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v24,v25} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v26,v27} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v28,v29} } } */ +/* { dg-final { scan-assembler-not {vwcvt\.x\.x\.v\s+v30,v31} } } */
