https://gcc.gnu.org/g:be21dc1a98b6f6bb51c8c34b5a6467a286529a57
commit r17-639-gbe21dc1a98b6f6bb51c8c34b5a6467a286529a57 Author: Christoph Müllner <[email protected]> Date: Sun May 17 22:07:41 2026 +0200 RISC-V: Add C API feature bits for existing extensions The RISC-V C API already allocates feature bits for b, e, h, zilsd, zclsd, zcmp, zifencei, and zmmul. GCC already has these extensions in riscv-ext.def, but the FMV bitmask table and the libgcc copy of the bit definitions did not include them. This patch only adds metadata. It does not add ISA extension support. gcc/ChangeLog: * common/config/riscv/riscv-ext-bitmask.def: Add b, e, h, zilsd, zclsd, zcmp, zifencei, and zmmul. libgcc/ChangeLog: * config/riscv/feature_bits.c (B_GROUPID, B_BITMASK, E_GROUPID, E_BITMASK, H_GROUPID, H_BITMASK, ZILSD_GROUPID, ZILSD_BITMASK, ZCLSD_GROUPID, ZCLSD_BITMASK, ZCMP_GROUPID, ZCMP_BITMASK, ZIFENCEI_GROUPID, ZIFENCEI_BITMASK, ZMMUL_GROUPID, ZMMUL_BITMASK): Define. Signed-off-by: Christoph Müllner <[email protected]> Diff: --- gcc/common/config/riscv/riscv-ext-bitmask.def | 8 ++++++++ libgcc/config/riscv/feature_bits.c | 16 ++++++++++++++++ 2 files changed, 24 insertions(+) diff --git a/gcc/common/config/riscv/riscv-ext-bitmask.def b/gcc/common/config/riscv/riscv-ext-bitmask.def index 74bac07a7ab0..4c8cd3bc466a 100644 --- a/gcc/common/config/riscv/riscv-ext-bitmask.def +++ b/gcc/common/config/riscv/riscv-ext-bitmask.def @@ -27,12 +27,16 @@ along with GCC; see the file COPYING3. If not see minimal feature bits. */ RISCV_EXT_BITMASK ("i", 0, 8) +RISCV_EXT_BITMASK ("e", 0, 4) RISCV_EXT_BITMASK ("m", 0, 12) +RISCV_EXT_BITMASK ("zmmul", 1, 12) RISCV_EXT_BITMASK ("a", 0, 0) RISCV_EXT_BITMASK ("f", 0, 5) RISCV_EXT_BITMASK ("d", 0, 3) RISCV_EXT_BITMASK ("c", 0, 2) +RISCV_EXT_BITMASK ("h", 0, 7) RISCV_EXT_BITMASK ("v", 0, 21) +RISCV_EXT_BITMASK ("b", 0, 1) RISCV_EXT_BITMASK ("zba", 0, 27) RISCV_EXT_BITMASK ("zbb", 0, 28) RISCV_EXT_BITMASK ("zbs", 0, 33) @@ -79,5 +83,9 @@ RISCV_EXT_BITMASK ("zcd", 1, 4) RISCV_EXT_BITMASK ("zcf", 1, 5) RISCV_EXT_BITMASK ("zcmop", 1, 6) RISCV_EXT_BITMASK ("zawrs", 1, 7) +RISCV_EXT_BITMASK ("zilsd", 1, 8) +RISCV_EXT_BITMASK ("zclsd", 1, 9) +RISCV_EXT_BITMASK ("zcmp", 1, 10) +RISCV_EXT_BITMASK ("zifencei", 1, 11) #undef RISCV_EXT_BITMASK diff --git a/libgcc/config/riscv/feature_bits.c b/libgcc/config/riscv/feature_bits.c index dd297b1be5c0..1f1c11e4c4bb 100644 --- a/libgcc/config/riscv/feature_bits.c +++ b/libgcc/config/riscv/feature_bits.c @@ -38,12 +38,18 @@ struct { #define A_GROUPID 0 #define A_BITMASK (1ULL << 0) +#define B_GROUPID 0 +#define B_BITMASK (1ULL << 1) #define C_GROUPID 0 #define C_BITMASK (1ULL << 2) #define D_GROUPID 0 #define D_BITMASK (1ULL << 3) +#define E_GROUPID 0 +#define E_BITMASK (1ULL << 4) #define F_GROUPID 0 #define F_BITMASK (1ULL << 5) +#define H_GROUPID 0 +#define H_BITMASK (1ULL << 7) #define I_GROUPID 0 #define I_BITMASK (1ULL << 8) #define M_GROUPID 0 @@ -142,6 +148,16 @@ struct { #define ZCMOP_BITMASK (1ULL << 6) #define ZAWRS_GROUPID 1 #define ZAWRS_BITMASK (1ULL << 7) +#define ZILSD_GROUPID 1 +#define ZILSD_BITMASK (1ULL << 8) +#define ZCLSD_GROUPID 1 +#define ZCLSD_BITMASK (1ULL << 9) +#define ZCMP_GROUPID 1 +#define ZCMP_BITMASK (1ULL << 10) +#define ZIFENCEI_GROUPID 1 +#define ZIFENCEI_BITMASK (1ULL << 11) +#define ZMMUL_GROUPID 1 +#define ZMMUL_BITMASK (1ULL << 12) #define SET_EXT(EXT) features[EXT##_GROUPID] |= EXT##_BITMASK
