https://gcc.gnu.org/g:cba963716af01d291bb131f6bddd613eaef51782

commit cba963716af01d291bb131f6bddd613eaef51782
Author: Michael Meissner <[email protected]>
Date:   Thu Mar 5 20:04:42 2026 -0500

    Add the -mdense-math option.
    
    This patch adds the -mdense-math option for -mcpu=future.  The next set of
    patches will support for using dense math registers with the MMA 
instructions.
    All this patch does is add the option.  A future patch will implement 
support
    for dense math registers, and another patch will then switch the MMA
    instructions to use dense math registers.
    
    The patches have been tested on both little and big endian systems.  Can I 
check
    it into the master branch?
    
    This is version 4 of the patches.  The previous patches were:
    
     * https://gcc.gnu.org/pipermail/gcc-patches/2026-February/707452.html
     * https://gcc.gnu.org/pipermail/gcc-patches/2026-February/707453.html
     * https://gcc.gnu.org/pipermail/gcc-patches/2026-February/707454.html
     * https://gcc.gnu.org/pipermail/gcc-patches/2026-February/707455.html
     * https://gcc.gnu.org/pipermail/gcc-patches/2026-February/707456.html
    
    gcc/
    
    2026-03-05   Michael Meissner  <[email protected]>
    
            * config/rs6000/rs6000-c.cc (rs6000_define_or_undefine_macro): 
Define
            __MMA_DENSE_MATH__ if we have MMA that uses dense math register
            accumulators.  Define __MMA_NO_DENSE_MATH__ if we have MMA but we 
are
            using ISA 3.1 where the accumulators are overlaid over VSX registers
            0..32.  Define __DENSE_MATH__ if we have dense math registers.
            * config/rs6000/rs6000.cc (rs6000_option_override_internal): Do not
            allow -mdense-math unless -mcpu=future is used.
            (rs6000_opt_masks): Add -mdense-math support.
            * config/rs6000/rs6000.h (TARGET_MMA_DENSE_MATH): New macro.
            (TARGET_MMA_NO_DENSE_MATH): Likewise.
            * config/rs6000/rs6000.opt (-mdense-math): New option.
            * doc/invoke.texi (RS/6000 and PowerPC Options): Add -mdense-math.

Diff:
---
 gcc/config/rs6000/rs6000-c.cc | 22 ++++++++++++++++++++--
 gcc/config/rs6000/rs6000.cc   | 10 ++++++++++
 gcc/config/rs6000/rs6000.h    |  6 ++++++
 gcc/config/rs6000/rs6000.opt  |  4 ++++
 gcc/doc/invoke.texi           |  7 +++++++
 5 files changed, 47 insertions(+), 2 deletions(-)

diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index eb6a881aa9bd..a13ed0e07548 100644
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc
@@ -587,9 +587,27 @@ rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT 
flags)
   if (rs6000_cpu == PROCESSOR_CELL)
     rs6000_define_or_undefine_macro (define_p, "__PPU__");
 
-  /* Tell the user if we support the MMA instructions.  */
+  /* Tell the user if we support the MMA instructions.  Also tell them if we
+     have MMA with ISA 3.1 that uses accumulators overlaid over VSX registers
+     0..31 or if we have support with separate dense math accumulators.  */
   if ((flags & OPTION_MASK_MMA) != 0)
-    rs6000_define_or_undefine_macro (define_p, "__MMA__");
+    {
+      rs6000_define_or_undefine_macro (define_p, "__MMA__");
+      if ((flags & OPTION_MASK_DENSE_MATH) != 0)
+       {
+         rs6000_define_or_undefine_macro (define_p, "__MMA_DENSE_MATH__");
+         rs6000_define_or_undefine_macro (false, "__MMA_NO_DENSE_MATH__");
+       }
+      else
+       {
+         rs6000_define_or_undefine_macro (false, "__MMA_DENSE_MATH__");
+         rs6000_define_or_undefine_macro (define_p, "__MMA_NO_DENSE_MATH__");
+       }
+    }
+  /* Tell the user if we support the dense math registers for use with MMA and
+     cryptography.  */
+  if ((flags & OPTION_MASK_DENSE_MATH) != 0)
+    rs6000_define_or_undefine_macro (define_p, "__DENSE_MATH__");
   /* Whether pc-relative code is being generated.  */
   if ((flags & OPTION_MASK_PCREL) != 0)
     rs6000_define_or_undefine_macro (define_p, "__PCREL__");
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 3454a090dbc2..68d5e95179f7 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -4410,6 +4410,15 @@ rs6000_option_override_internal (bool global_init_p)
   if (!TARGET_PCREL && TARGET_PCREL_OPT)
     rs6000_isa_flags &= ~OPTION_MASK_PCREL_OPT;
 
+  /* Turn off dense math register support on non-future systems.  */
+  if (TARGET_DENSE_MATH && !TARGET_FUTURE)
+    {
+      if ((rs6000_isa_flags_explicit & OPTION_MASK_DENSE_MATH) != 0)
+       error ("%qs requires %qs", "-mdense-math", "-mcpu=future");
+
+      rs6000_isa_flags &= ~OPTION_MASK_DENSE_MATH;
+    }
+
   if (TARGET_DEBUG_REG || TARGET_DEBUG_TARGET)
     rs6000_print_isa_options (stderr, 0, "after subtarget", rs6000_isa_flags);
 
@@ -24463,6 +24472,7 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] =
                                                                false, true  },
   { "cmpb",                    OPTION_MASK_CMPB,               false, true  },
   { "crypto",                  OPTION_MASK_CRYPTO,             false, true  },
+  { "dense-math",              OPTION_MASK_DENSE_MATH,         false, true  },
   { "direct-move",             0,                              false, true  },
   { "dlmzb",                   OPTION_MASK_DLMZB,              false, true  },
   { "efficient-unaligned-vsx", OPTION_MASK_EFFICIENT_UNALIGNED_VSX,
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 04709f0dcd6e..91e60085515c 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -500,6 +500,12 @@ extern int rs6000_vector_align[];
 #define TARGET_MINMAX  (TARGET_HARD_FLOAT && TARGET_PPC_GFXOPT         \
                         && (TARGET_P9_MINMAX || !flag_trapping_math))
 
+/* Define if the MMA subsystem uses ISA 3.1 where the accumulators are overlaid
+   over VSX registers 0..31 or whether MMA uses separate dense math
+   accumulators.  */
+#define TARGET_MMA_DENSE_MATH          (TARGET_MMA && TARGET_DENSE_MATH)
+#define TARGET_MMA_NO_DENSE_MATH       (TARGET_MMA && !TARGET_DENSE_MATH)
+
 /* In switching from using target_flags to using rs6000_isa_flags, the options
    machinery creates OPTION_MASK_<xxx> instead of MASK_<xxx>.  The MASK_<xxxx>
    options that have not yet been replaced by their OPTION_MASK_<xxx>
diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index 9f3519da77b2..f836d1982877 100644
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -639,6 +639,10 @@ mieee128-constant
 Target Var(TARGET_IEEE128_CONSTANT) Init(1) Save
 Generate (do not generate) code that uses the LXVKQ instruction.
 
+mdense-math
+Target Mask(DENSE_MATH) Var(rs6000_isa_flags)
+Generate (do not generate) instructions that use dense math registers.
+
 ; Documented parameters
 
 -param=rs6000-vect-unroll-limit=
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 56bd4b35e9ae..eb774b0c622f 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -32675,6 +32675,13 @@ This option is enabled by default.
 Enable or disable warnings about deprecated @samp{vector long ...} Altivec
 type usage.  This option is enabled by default.
 
+@opindex mdense-math
+@opindex mno-dense-math
+@item -mdense-math
+@itemx -mno-dense-math
+Generate (do not generate) code that uses the dense math registers.
+This option is enabled by default.
+
 @end table
 
 @node RX Options

Reply via email to