https://gcc.gnu.org/g:884e3df4c511c07b6e0e4ea10dd7f8a9e3a7ef4b
commit 884e3df4c511c07b6e0e4ea10dd7f8a9e3a7ef4b
Author: Jeff Law <j...@ventanamicro.com>
Date: Fri Sep 19 09:17:01 2025 -0600
[RISC-V][PR target/121983] Fix unprotected REGNO invocation
So this was a naked REGNO usage, which of course blows up if RTL checking is
enabled and something else sneaks in (SUBREG). Thankfully it never
results in
incorrect code, though I could theorize it could cause a bootstrap
comparison
failure in the "right" circumstances.
Bootstrapped & regression tested on the Pioneer. Also regression tested on
riscv64-elf and riscv32-elf. I'll push to the trunk once pre-commit CI is
done.
jeff
PR target/121983
gcc/
* config/riscv/riscv.cc (riscv_macro_fusion_pair_p): Make sure
object is a REG before asking for its REGNO. Fix a trivial
whitespace nit.
gcc/testsuite/
* gcc.target/riscv/pr121983.c: New test.
(cherry picked from commit cc0959221ee2a6f17dda6335bb1615207e2c8e51)
Diff:
---
gcc/config/riscv/riscv.cc | 11 +++++++++--
gcc/testsuite/gcc.target/riscv/pr121983.c | 15 +++++++++++++++
2 files changed, 24 insertions(+), 2 deletions(-)
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 52c799b11c23..0db0d1daedbe 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -10369,6 +10369,7 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn
*curr)
&& GET_CODE (SET_SRC (curr_set)) == LSHIFTRT
&& REG_P (SET_DEST (prev_set))
&& REG_P (SET_DEST (curr_set))
+ && REG_P (XEXP (SET_SRC (curr_set), 0))
&& REGNO (XEXP (SET_SRC (curr_set), 0)) == curr_dest_regno
&& CONST_INT_P (XEXP (SET_SRC (prev_set), 1))
&& CONST_INT_P (XEXP (SET_SRC (curr_set), 1))
@@ -10397,6 +10398,7 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn
*curr)
&& GET_CODE (SET_SRC (curr_set)) == LSHIFTRT
&& REG_P (SET_DEST (prev_set))
&& REG_P (SET_DEST (curr_set))
+ && REG_P (XEXP (SET_SRC (curr_set), 0))
&& REGNO (XEXP (SET_SRC (curr_set), 0)) == curr_dest_regno
&& CONST_INT_P (XEXP (SET_SRC (prev_set), 1))
&& CONST_INT_P (XEXP (SET_SRC (curr_set), 1))
@@ -10421,6 +10423,7 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn
*curr)
if (MEM_P (SET_SRC (curr_set))
&& SCALAR_INT_MODE_P (GET_MODE (SET_DEST (curr_set)))
&& REG_P (XEXP (SET_SRC (curr_set), 0))
+ && REG_P (XEXP (SET_SRC (curr_set), 0))
&& REGNO (XEXP (SET_SRC (curr_set), 0)) == prev_dest_regno
&& GET_CODE (SET_SRC (prev_set)) == PLUS
&& REG_P (XEXP (SET_SRC (prev_set), 0))
@@ -10481,6 +10484,7 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn
*curr)
if (MEM_P (SET_SRC (curr_set))
&& SCALAR_INT_MODE_P (GET_MODE (SET_DEST (curr_set)))
&& GET_CODE (XEXP (SET_SRC (curr_set), 0)) == PLUS
+ && REG_P (XEXP (XEXP (SET_SRC (curr_set), 0), 0))
&& REGNO (XEXP (XEXP (SET_SRC (curr_set), 0), 0)) == prev_dest_regno)
{
if (riscv_set_is_add (prev_set))
@@ -10539,8 +10543,8 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn
*curr)
&& MEM_P (XEXP (SET_SRC (curr_set), 0))
&& SCALAR_INT_MODE_P (GET_MODE (SET_DEST (curr_set)))
&& GET_CODE (XEXP (XEXP (SET_SRC (curr_set), 0), 0)) == PLUS
- && REG_P (XEXP (XEXP (XEXP (SET_SRC (curr_set), 0), 0),0))
- && (REGNO (XEXP (XEXP (XEXP (SET_SRC (curr_set), 0), 0),0))
+ && REG_P (XEXP (XEXP (XEXP (SET_SRC (curr_set), 0), 0), 0))
+ && (REGNO (XEXP (XEXP (XEXP (SET_SRC (curr_set), 0), 0), 0))
== prev_dest_regno))
{
if (riscv_set_is_adduw (prev_set))
@@ -10672,6 +10676,7 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn
*curr)
&& MEM_P (SET_SRC (curr_set))
&& SCALAR_INT_MODE_P (GET_MODE (SET_DEST (curr_set)))
&& GET_CODE (XEXP (SET_SRC (curr_set), 0)) == PLUS
+ && REG_P (XEXP (XEXP (SET_SRC (curr_set), 0), 0))
&& REGNO (XEXP (XEXP (SET_SRC (curr_set), 0), 0)) == prev_dest_regno)
{
if (dump_file)
@@ -10683,6 +10688,7 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn
*curr)
&& MEM_P (SET_SRC (curr_set))
&& SCALAR_INT_MODE_P (GET_MODE (SET_DEST (curr_set)))
&& GET_CODE (XEXP (SET_SRC (curr_set), 0)) == LO_SUM
+ && REG_P (XEXP (XEXP (SET_SRC (curr_set), 0), 0))
&& REGNO (XEXP (XEXP (SET_SRC (curr_set), 0), 0)) == prev_dest_regno)
{
if (dump_file)
@@ -10696,6 +10702,7 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn
*curr)
&& MEM_P (XEXP (SET_SRC (curr_set), 0))
&& SCALAR_INT_MODE_P (GET_MODE (SET_DEST (curr_set)))
&& (GET_CODE (XEXP (XEXP (SET_SRC (curr_set), 0), 0)) == LO_SUM
+ && REG_P (XEXP (XEXP (XEXP (SET_SRC (curr_set), 0), 0), 0))
&& (REGNO (XEXP (XEXP (XEXP (SET_SRC (curr_set), 0), 0), 0))
== prev_dest_regno)))
{
diff --git a/gcc/testsuite/gcc.target/riscv/pr121983.c
b/gcc/testsuite/gcc.target/riscv/pr121983.c
new file mode 100644
index 000000000000..1572c379a038
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/pr121983.c
@@ -0,0 +1,15 @@
+/* { dg-do compile } */
+/* { dg-options "-mcpu=xiangshan-nanhu" } */
+
+struct {
+ int a;
+ short s;
+ unsigned x : 18;
+ unsigned y : 14;
+} bf;
+
+void
+foo()
+{
+ bf.s ^= bf.y / __builtin_stdc_rotate_left(bf.x, 5);
+}
