https://gcc.gnu.org/g:04cfb71957473c3c738e2900940a6781a3f0544d

commit r16-2385-g04cfb71957473c3c738e2900940a6781a3f0544d
Author: Pan Li <pan2...@intel.com>
Date:   Mon Jul 21 09:13:27 2025 +0800

    RISC-V: Add test for vec_duplicate + vaaddu.vv combine case 0 with GR2VR 
cost 0, 2 and 15 for QI, HI and SI mode
    
    Add asm dump check and run test for vec_duplicate + vaaddu.vv
    combine to vaaddu.vx, with the GR2VR cost is 0, 2 and 15.  Please
    note DImode is not included here.
    
    gcc/testsuite/ChangeLog:
    
            * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c: Add asm check.
            * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c: Ditto.
            * gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c: Ditto.
            * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c: Ditto.
            * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c: Ditto.
            * gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c: Ditto.
            * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c: Ditto.
            * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c: Ditto.
            * gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c: Ditto.
            * gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h: Add test
            helper macros.
            * gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h: Add test
            data for run test.
            * gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u16.c: New test.
            * gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u32.c: New test.
            * gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u8.c: New test.
    
    Signed-off-by: Pan Li <pan2...@intel.com>

Diff:
---
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c   |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c   |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c  |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c   |   1 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h |  56 ++++--
 .../riscv/rvv/autovec/vx_vf/vx_binary_data.h       | 196 +++++++++++++++++++++
 .../riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u16.c   |  17 ++
 .../riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u32.c   |  17 ++
 .../riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u8.c    |  17 ++
 14 files changed, 297 insertions(+), 15 deletions(-)

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c
index b064748fc145..cb62e0f96199 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c
@@ -19,3 +19,4 @@ TEST_BINARY_VX_UNSIGNED_0(T)
 /* { dg-final { scan-assembler-times {vminu.vx} 2 } } */
 /* { dg-final { scan-assembler-times {vsaddu.vx} 1 } } */
 /* { dg-final { scan-assembler-times {vssubu.vx} 1 } } */
+/* { dg-final { scan-assembler-times {vaaddu.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c
index e334bb3690b7..e2a5dbbc8599 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c
@@ -19,3 +19,4 @@ TEST_BINARY_VX_UNSIGNED_0(T)
 /* { dg-final { scan-assembler-times {vminu.vx} 2 } } */
 /* { dg-final { scan-assembler-times {vsaddu.vx} 1 } } */
 /* { dg-final { scan-assembler-times {vssubu.vx} 1 } } */
+/* { dg-final { scan-assembler-times {vaaddu.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c
index 1f995cd8dc1f..559887e69b0e 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c
@@ -19,3 +19,4 @@ TEST_BINARY_VX_UNSIGNED_0(T)
 /* { dg-final { scan-assembler-times {vminu.vx} 2 } } */
 /* { dg-final { scan-assembler-times {vsaddu.vx} 1 } } */
 /* { dg-final { scan-assembler-times {vssubu.vx} 1 } } */
+/* { dg-final { scan-assembler-times {vaaddu.vx} 1 } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c
index f7fae3757a15..365e650ef12b 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c
@@ -19,3 +19,4 @@ TEST_BINARY_VX_UNSIGNED_0(T)
 /* { dg-final { scan-assembler-not {vminu.vx} } } */
 /* { dg-final { scan-assembler-not {vsaddu.vx} } } */
 /* { dg-final { scan-assembler-not {vssubu.vx} } } */
+/* { dg-final { scan-assembler-not {vaaddu.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c
index b111a4e491be..c8fd42a52c46 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c
@@ -19,3 +19,4 @@ TEST_BINARY_VX_UNSIGNED_0(T)
 /* { dg-final { scan-assembler-not {vminu.vx} } } */
 /* { dg-final { scan-assembler-not {vsaddu.vx} } } */
 /* { dg-final { scan-assembler-not {vssubu.vx} } } */
+/* { dg-final { scan-assembler-not {vaaddu.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c
index 58341adb0f55..fc9c10125a87 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c
@@ -19,3 +19,4 @@ TEST_BINARY_VX_UNSIGNED_0(T)
 /* { dg-final { scan-assembler-not {vminu.vx} } } */
 /* { dg-final { scan-assembler-not {vsaddu.vx} } } */
 /* { dg-final { scan-assembler-not {vssubu.vx} } } */
+/* { dg-final { scan-assembler-not {vaaddu.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c
index 406b999267f1..121daebcf552 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c
@@ -19,3 +19,4 @@ TEST_BINARY_VX_UNSIGNED_0(T)
 /* { dg-final { scan-assembler-not {vminu.vx} } } */
 /* { dg-final { scan-assembler-not {vsaddu.vx} } } */
 /* { dg-final { scan-assembler-not {vssubu.vx} } } */
+/* { dg-final { scan-assembler-not {vaaddu.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c
index 6792b6b94b2a..9616e7f2fe45 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c
@@ -19,3 +19,4 @@ TEST_BINARY_VX_UNSIGNED_0(T)
 /* { dg-final { scan-assembler-not {vminu.vx} } } */
 /* { dg-final { scan-assembler-not {vsaddu.vx} } } */
 /* { dg-final { scan-assembler-not {vssubu.vx} } } */
+/* { dg-final { scan-assembler-not {vaaddu.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c
index 4e30498ab159..3bb382dd395e 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c
@@ -19,3 +19,4 @@ TEST_BINARY_VX_UNSIGNED_0(T)
 /* { dg-final { scan-assembler-not {vminu.vx} } } */
 /* { dg-final { scan-assembler-not {vsaddu.vx} } } */
 /* { dg-final { scan-assembler-not {vssubu.vx} } } */
+/* { dg-final { scan-assembler-not {vaaddu.vx} } } */
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h
index 6d4d720d058d..38f2f72ed011 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary.h
@@ -3,6 +3,13 @@
 
 #include <stdint.h>
 
+#undef HAS_UINT128
+
+#if __riscv_xlen == 64
+#define HAS_UINT128
+typedef unsigned __int128 uint128_t;
+#endif
+
 #define DEF_VX_BINARY_CASE_0(T, OP, NAME)                                \
 void                                                                     \
 test_vx_binary_##NAME##_##T##_case_0 (T * restrict out, T * restrict in, \
@@ -340,6 +347,24 @@ DEF_SAT_S_SUB(int64_t, uint64_t, INT64_MIN, INT64_MAX)
 #define SAT_S_SUB_FUNC(T) test_##T##_sat_sub
 #define SAT_S_SUB_FUNC_WRAP(T) SAT_S_SUB_FUNC(T)
 
+#define DEF_AVG_FLOOR(NT, WT)        \
+NT                                   \
+test_##NT##_avg_floor(NT x, NT y)    \
+{                                    \
+  return (NT)(((WT)x + (WT)y) >> 1); \
+}
+
+DEF_AVG_FLOOR(uint8_t, uint16_t)
+DEF_AVG_FLOOR(uint16_t, uint32_t)
+DEF_AVG_FLOOR(uint32_t, uint64_t)
+
+#ifdef HAS_UINT128
+  DEF_AVG_FLOOR(uint64_t, uint128_t)
+#endif
+
+#define AVG_FLOOR_FUNC(T)      test_##T##_avg_floor
+#define AVG_FLOOR_FUNC_WRAP(T) AVG_FLOOR_FUNC(T)
+
 #define TEST_BINARY_VX_SIGNED_0(T)                         \
   DEF_VX_BINARY_CASE_0_WRAP(T, +, add)                     \
   DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)                     \
@@ -357,20 +382,21 @@ DEF_SAT_S_SUB(int64_t, uint64_t, INT64_MIN, INT64_MAX)
   DEF_VX_BINARY_CASE_2_WRAP(T, SAT_S_ADD_FUNC(T), sat_add) \
   DEF_VX_BINARY_CASE_2_WRAP(T, SAT_S_SUB_FUNC(T), sat_sub) \
 
-#define TEST_BINARY_VX_UNSIGNED_0(T)                       \
-  DEF_VX_BINARY_CASE_0_WRAP(T, +, add)                     \
-  DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)                     \
-  DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub)            \
-  DEF_VX_BINARY_CASE_0_WRAP(T, &, and)                     \
-  DEF_VX_BINARY_CASE_0_WRAP(T, |, or)                      \
-  DEF_VX_BINARY_CASE_0_WRAP(T, ^, xor)                     \
-  DEF_VX_BINARY_CASE_0_WRAP(T, /, div)                     \
-  DEF_VX_BINARY_CASE_0_WRAP(T, %, rem)                     \
-  DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_0_WARP(T), max)    \
-  DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_1_WARP(T), max)    \
-  DEF_VX_BINARY_CASE_2_WRAP(T, MIN_FUNC_0_WARP(T), min)    \
-  DEF_VX_BINARY_CASE_2_WRAP(T, MIN_FUNC_1_WARP(T), min)    \
-  DEF_VX_BINARY_CASE_2_WRAP(T, SAT_U_ADD_FUNC(T), sat_add) \
-  DEF_VX_BINARY_CASE_2_WRAP(T, SAT_U_SUB_FUNC(T), sat_sub) \
+#define TEST_BINARY_VX_UNSIGNED_0(T)                              \
+  DEF_VX_BINARY_CASE_0_WRAP(T, +, add)                            \
+  DEF_VX_BINARY_CASE_0_WRAP(T, -, sub)                            \
+  DEF_VX_BINARY_REVERSE_CASE_0_WRAP(T, -, rsub)                   \
+  DEF_VX_BINARY_CASE_0_WRAP(T, &, and)                            \
+  DEF_VX_BINARY_CASE_0_WRAP(T, |, or)                             \
+  DEF_VX_BINARY_CASE_0_WRAP(T, ^, xor)                            \
+  DEF_VX_BINARY_CASE_0_WRAP(T, /, div)                            \
+  DEF_VX_BINARY_CASE_0_WRAP(T, %, rem)                            \
+  DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_0_WARP(T), max)           \
+  DEF_VX_BINARY_CASE_2_WRAP(T, MAX_FUNC_1_WARP(T), max)           \
+  DEF_VX_BINARY_CASE_2_WRAP(T, MIN_FUNC_0_WARP(T), min)           \
+  DEF_VX_BINARY_CASE_2_WRAP(T, MIN_FUNC_1_WARP(T), min)           \
+  DEF_VX_BINARY_CASE_2_WRAP(T, SAT_U_ADD_FUNC(T), sat_add)        \
+  DEF_VX_BINARY_CASE_2_WRAP(T, SAT_U_SUB_FUNC(T), sat_sub)        \
+  DEF_VX_BINARY_CASE_2_WRAP(T, AVG_FLOOR_FUNC_WRAP(T), avg_floor) \
 
 #endif
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h
index 47f612825b48..b742856bbb40 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_binary_data.h
@@ -4906,4 +4906,200 @@ int64_t TEST_BINARY_DATA(int64_t, sat_sub)[][3][N] =
   },
 };
 
+uint8_t TEST_BINARY_DATA(uint8_t, avg_floor)[][3][N] =
+{
+  {
+    { 0 },
+    {
+       2,  2,  2,  2,
+       1,  1,  1,  1,
+       0,  0,  0,  0,
+       4,  4,  4,  4,
+    },
+    {
+       1,  1,  1,  1,
+       0,  0,  0,  0,
+       0,  0,  0,  0,
+       2,  2,  2,  2,
+    },
+  },
+  {
+    { 127 },
+    {
+       127,  127,  127,  127,
+       128,  128,  128,  128,
+       255,  255,  255,  255,
+         1,    1,    1,    1,
+    },
+    {
+       127,  127,  127,  127,
+       127,  127,  127,  127,
+       191,  191,  191,  191,
+        64,   64,   64,   64,
+    },
+  },
+  {
+    { 255 },
+    {
+         0,    0,    0,    0,
+       255,  255,  255,  255,
+       254,  254,  254,  254,
+         1,    1,    1,    1,
+    },
+    {
+       127,  127,  127,  127,
+       255,  255,  255,  255,
+       254,  254,  254,  254,
+       128,  128,  128,  128,
+    },
+  },
+};
+
+uint16_t TEST_BINARY_DATA(uint16_t, avg_floor)[][3][N] =
+{
+  {
+    { 0 },
+    {
+       2,  2,  2,  2,
+       1,  1,  1,  1,
+       0,  0,  0,  0,
+       4,  4,  4,  4,
+    },
+    {
+       1,  1,  1,  1,
+       0,  0,  0,  0,
+       0,  0,  0,  0,
+       2,  2,  2,  2,
+    },
+  },
+  {
+    { 32767 },
+    {
+       32767,  32767,  32767,  32767,
+       32768,  32768,  32768,  32768,
+       65535,  65535,  65535,  65535,
+           1,      1,      1,      1,
+    },
+    {
+       32767,  32767,  32767,  32767,
+       32767,  32767,  32767,  32767,
+       49151,  49151,  49151,  49151,
+       16384,  16384,  16384,  16384,
+    },
+  },
+  {
+    { 65535 },
+    {
+           0,      0,      0,      0,
+       65535,  65535,  65535,  65535,
+       65534,  65534,  65534,  65534,
+           1,      1,      1,      1,
+    },
+    {
+       32767,  32767,  32767,  32767,
+       65535,  65535,  65535,  65535,
+       65534,  65534,  65534,  65534,
+       32768,  32768,  32768,  32768,
+    },
+  },
+};
+
+uint32_t TEST_BINARY_DATA(uint32_t, avg_floor)[][3][N] =
+{
+  {
+    { 0 },
+    {
+       2,  2,  2,  2,
+       1,  1,  1,  1,
+       0,  0,  0,  0,
+       4,  4,  4,  4,
+    },
+    {
+       1,  1,  1,  1,
+       0,  0,  0,  0,
+       0,  0,  0,  0,
+       2,  2,  2,  2,
+    },
+  },
+  {
+    { 2147483647 },
+    {
+       2147483647,  2147483647,  2147483647,  2147483647,
+       2147483648,  2147483648,  2147483648,  2147483648,
+       4294967295,  4294967295,  4294967295,  4294967295,
+                1,           1,           1,           1,
+    },
+    {
+       2147483647,  2147483647,  2147483647,  2147483647,
+       2147483647,  2147483647,  2147483647,  2147483647,
+       3221225471,  3221225471,  3221225471,  3221225471,
+       1073741824,  1073741824,  1073741824,  1073741824,
+    },
+  },
+  {
+    { 4294967295 },
+    {
+                0,           0,           0,           0,
+       4294967295,  4294967295,  4294967295,  4294967295,
+       4294967294,  4294967294,  4294967294,  4294967294,
+                1,           1,           1,           1,
+    },
+    {
+       2147483647,  2147483647,  2147483647,  2147483647,
+       4294967295,  4294967295,  4294967295,  4294967295,
+       4294967294,  4294967294,  4294967294,  4294967294,
+       2147483648,  2147483648,  2147483648,  2147483648,
+    },
+  },
+};
+
+uint64_t TEST_BINARY_DATA(uint64_t, avg_floor)[][3][N] =
+{
+  {
+    { 0 },
+    {
+       2,  2,  2,  2,
+       1,  1,  1,  1,
+       0,  0,  0,  0,
+       4,  4,  4,  4,
+    },
+    {
+       1,  1,  1,  1,
+       0,  0,  0,  0,
+       0,  0,  0,  0,
+       2,  2,  2,  2,
+    },
+  },
+  {
+    { 9223372036854775807ull },
+    {
+       9223372036854775807ull,  9223372036854775807ull,  
9223372036854775807ull,  9223372036854775807ull,
+       9223372036854775808ull,  9223372036854775808ull,  
9223372036854775808ull,  9223372036854775808ull,
+       18446744073709551615ull,  18446744073709551615ull,  
18446744073709551615ull,  18446744073709551615ull,
+         1,    1,    1,    1,
+    },
+    {
+       9223372036854775807ull,  9223372036854775807ull,  
9223372036854775807ull,  9223372036854775807ull,
+       9223372036854775807ull,  9223372036854775807ull,  
9223372036854775807ull,  9223372036854775807ull,
+      13835058055282163711ull, 13835058055282163711ull, 
13835058055282163711ull, 13835058055282163711ull,
+       4611686018427387904ull,  4611686018427387904ull,  
4611686018427387904ull,  4611686018427387904ull,
+    },
+  },
+  {
+    { 18446744073709551615ull },
+    {
+         0,    0,    0,    0,
+       18446744073709551615ull,  18446744073709551615ull,  
18446744073709551615ull,  18446744073709551615ull,
+       18446744073709551614ull,  18446744073709551614ull,  
18446744073709551614ull,  18446744073709551614ull,
+         1,    1,    1,    1,
+    },
+    {
+       9223372036854775807ull,  9223372036854775807ull,  
9223372036854775807ull,  9223372036854775807ull,
+      18446744073709551615ull, 18446744073709551615ull, 
18446744073709551615ull, 18446744073709551615ull,
+      18446744073709551614ull, 18446744073709551614ull, 
18446744073709551614ull, 18446744073709551614ull,
+       9223372036854775808ull,  9223372036854775808ull,  
9223372036854775808ull,  9223372036854775808ull,
+    },
+  },
+};
+
 #endif
diff --git 
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u16.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u16.c
new file mode 100644
index 000000000000..73d1a57bae6b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u16.c
@@ -0,0 +1,17 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */
+
+#include "vx_binary.h"
+#include "vx_binary_data.h"
+
+#define T          uint16_t
+#define NAME       avg_floor
+#define FUNC       AVG_FLOOR_FUNC_WRAP(T)
+#define TEST_DATA  TEST_BINARY_DATA_WRAP(T, NAME)
+
+DEF_VX_BINARY_CASE_2_WRAP(T, FUNC, NAME)
+
+#define TEST_RUN(T, NAME, out, in, x, n) \
+  RUN_VX_BINARY_CASE_2_WRAP(T, NAME, FUNC, out, in, x, n)
+
+#include "vx_binary_run.h"
diff --git 
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u32.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u32.c
new file mode 100644
index 000000000000..60a7aa4ccb7d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u32.c
@@ -0,0 +1,17 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */
+
+#include "vx_binary.h"
+#include "vx_binary_data.h"
+
+#define T          uint32_t
+#define NAME       avg_floor
+#define FUNC       AVG_FLOOR_FUNC_WRAP(T)
+#define TEST_DATA  TEST_BINARY_DATA_WRAP(T, NAME)
+
+DEF_VX_BINARY_CASE_2_WRAP(T, FUNC, NAME)
+
+#define TEST_RUN(T, NAME, out, in, x, n) \
+  RUN_VX_BINARY_CASE_2_WRAP(T, NAME, FUNC, out, in, x, n)
+
+#include "vx_binary_run.h"
diff --git 
a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u8.c 
b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u8.c
new file mode 100644
index 000000000000..f28147bfc3bc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/vx_vaadd-run-1-u8.c
@@ -0,0 +1,17 @@
+/* { dg-do run { target { riscv_v } } } */
+/* { dg-additional-options "-std=c99 --param=gpr2vr-cost=0" } */
+
+#include "vx_binary.h"
+#include "vx_binary_data.h"
+
+#define T          uint8_t
+#define NAME       avg_floor
+#define FUNC       AVG_FLOOR_FUNC_WRAP(T)
+#define TEST_DATA  TEST_BINARY_DATA_WRAP(T, NAME)
+
+DEF_VX_BINARY_CASE_2_WRAP(T, FUNC, NAME)
+
+#define TEST_RUN(T, NAME, out, in, x, n) \
+  RUN_VX_BINARY_CASE_2_WRAP(T, NAME, FUNC, out, in, x, n)
+
+#include "vx_binary_run.h"

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