https://gcc.gnu.org/g:ea6e839e9a3a3730708a3696d8e2aebaa090d7b3
commit ea6e839e9a3a3730708a3696d8e2aebaa090d7b3
Author: Michael Meissner <meiss...@linux.ibm.com>
Date: Thu Mar 27 21:02:58 2025 -0400
Update ChangeLog.*
Diff:
---
gcc/ChangeLog.dmf | 111 ++++--------------------------------------------------
1 file changed, 8 insertions(+), 103 deletions(-)
diff --git a/gcc/ChangeLog.dmf b/gcc/ChangeLog.dmf
index 145e927a7a35..eae8125e775a 100644
--- a/gcc/ChangeLog.dmf
+++ b/gcc/ChangeLog.dmf
@@ -1,99 +1,4 @@
-==================== Branch work196-dmf, patch #121 was reverted
====================
-==================== Branch work196-dmf, patch #120 was reverted
====================
-
-==================== Branch work196-dmf, patch #111 ====================
-
-RFC2655-Add saturating subtract built-ins.
-
-This patch adds support for a saturating subtract built-in function that may be
-added to a future PowerPC processor. Note, if it is added, the name of the
-built-in function may change before GCC 13 is released. If the name changes,
-we will submit a patch changing the name.
-
-I also added support for providing dense math built-in functions, even though
-at present, we have not added any new built-in functions for dense math. It is
-likely we will want to add new dense math built-in functions as the dense math
-support is fleshed out.
-
-The patches have been tested on both little and big endian systems. Can I
check
-it into the master branch?
-
-2025-03-08 Michael Meissner <meiss...@linux.ibm.com>
-
-gcc/
-
- * config/rs6000/rs6000-builtin.cc (rs6000_invalid_builtin): Add support
- for flagging invalid use of future built-in functions.
- (rs6000_builtin_is_supported): Add support for future built-in
- functions.
- * config/rs6000/rs6000-builtins.def (__builtin_saturate_subtract32): New
- built-in function for -mcpu=future.
- (__builtin_saturate_subtract64): Likewise.
- * config/rs6000/rs6000-gen-builtins.cc (enum bif_stanza): Add stanzas
- for -mcpu=future built-ins.
- (stanza_map): Likewise.
- (enable_string): Likewise.
- (struct attrinfo): Likewise.
- (parse_bif_attrs): Likewise.
- (write_decls): Likewise.
- * config/rs6000/rs6000.md (sat_sub<mode>3): Add saturating subtract
- built-in insn declarations.
- (sat_sub<mode>3_dot): Likewise.
- (sat_sub<mode>3_dot2): Likewise.
- * doc/extend.texi (Future PowerPC built-ins): New section.
-
-gcc/testsuite/
-
- * gcc.target/powerpc/subfus-1.c: New test.
- * gcc.target/powerpc/subfus-2.c: Likewise.
-
-==================== Branch work196-dmf, patch #110 ====================
-
-RFC2656-Support load/store vector with right length.
-
-This patch adds support for new instructions that may be added to the PowerPC
-architecture in the future to enhance the load and store vector with length
-instructions.
-
-The current instructions (lxvl, lxvll, stxvl, and stxvll) are inconvient to use
-since the count for the number of bytes must be in the top 8 bits of the GPR
-register, instead of the bottom 8 bits. This meant that code generating these
-instructions typically had to do a shift left by 56 bits to get the count into
-the right position. In a future version of the PowerPC architecture, new
-variants of these instructions might be added that expect the count to be in
-the bottom 8 bits of the GPR register. These patches add this support to GCC
-if the user uses the -mcpu=future option.
-
-I discovered that the code in rs6000-string.cc to generate ISA 3.1 lxvl/stxvl
-future lxvll/stxvll instructions would generate these instructions on 32-bit.
-However the patterns for these instructions is only done on 64-bit systems. So
-I added a check for 64-bit support before generating the instructions.
-
-The patches have been tested on both little and big endian systems. Can I
check
-it into the master branch?
-
-2025-03-08 Michael Meissner <meiss...@linux.ibm.com>
-
-gcc/
-
- * config/rs6000/rs6000-string.cc (expand_block_move): Do not generate
- lxvl and stxvl on 32-bit.
- * config/rs6000/vsx.md (lxvl): If -mcpu=future, generate the lxvl with
- the shift count automaticaly used in the insn.
- (lxvrl): New insn for -mcpu=future.
- (lxvrll): Likewise.
- (stxvl): If -mcpu=future, generate the stxvl with the shift count
- automaticaly used in the insn.
- (stxvrl): New insn for -mcpu=future.
- (stxvrll): Likewise.
-
-gcc/testsuite/
-
- * gcc.target/powerpc/lxvrl.c: New test.
- * lib/target-supports.exp (check_effective_target_powerpc_future_ok):
- New effective target.
-
-==================== Branch work196-dmf, patch #102 ====================
+==================== Branch work198-dmf, patch #102 ====================
RFC2653-PowerPC: Add support for 1,024 bit DMR registers.
@@ -167,7 +72,7 @@ gcc/testsuite/
* lib/target-supports.exp (check_effective_target_ppc_dmr_ok): New
target test.
-==================== Branch work196-dmf, patch #101 ====================
+==================== Branch work198-dmf, patch #101 ====================
RFC2653-Add support for dense math registers.
@@ -220,7 +125,7 @@ produce other changes in the future.
gcc/
-2025-03-08 Michael Meissner <meiss...@linux.ibm.com>
+2025-03-24 Michael Meissner <meiss...@linux.ibm.com>
* config/rs6000/mma.md (UNSPEC_MMA_DMSETDMRZ): New unspec.
(movxo): Add comments about dense math registers.
@@ -280,7 +185,7 @@ gcc/
* config/rs6000/rs6000.md (FIRST_DMR_REGNO): New constant.
(LAST_DMR_REGNO): Likewise.
-==================== Branch work196-dmf, patch #100 ====================
+==================== Branch work198-dmf, patch #100 ====================
RFC2653-Add wD constraint.
@@ -289,7 +194,7 @@ that overlap with VSX registers 0..31 on power10. Future
patches will add the
support for a separate accumulator register class that will be used when the
support for dense math registes is added.
-2025-03-08 Michael Meissner <meiss...@linux.ibm.com>
+2025-03-24 Michael Meissner <meiss...@linux.ibm.com>
* config/rs6000/constraints.md (wD): New constraint.
* config/rs6000/mma.md (mma_<acc>): Prepare for alternate accumulator
@@ -318,17 +223,17 @@ support for dense math registes is added.
the 'wD' constraint.
* doc/md.texi (PowerPC constraints): Document the 'wD' constraint.
-==================== Branch work196-dmf, baseline ====================
+==================== Branch work198-dmf, baseline ====================
Add ChangeLog.dmf and update REVISION.
-2025-03-08 Michael Meissner <meiss...@linux.ibm.com>
+2025-03-24 Michael Meissner <meiss...@linux.ibm.com>
gcc/
* ChangeLog.dmf: New file for branch.
* REVISION: Update.
-2025-03-24 Michael Meissner <meiss...@linux.ibm.com>
+2025-03-27 Michael Meissner <meiss...@linux.ibm.com>
Clone branch
