https://gcc.gnu.org/g:7e947040a48d3156c602e88fb938c7bd44e83b28

commit r15-8442-g7e947040a48d3156c602e88fb938c7bd44e83b28
Author: Stefan Schulze Frielinghaus <stefa...@gcc.gnu.org>
Date:   Wed Mar 19 16:35:12 2025 +0100

    s390: testsuite: Fix vcond-shift.c
    
    Previously we optimized expressions of the form a < 0 ? -1 : 0 to
    (signed)a >> 31 during vcond expanding.  Since r15-1638-gaac00d09859cc5
    this is done in match.pd.  The implementation in the back end as well as
    in match.pd are basically the same but still distinct.  For the tests in
    vcond-shift.c the back end emitted
    
      (xx - (xx >> 31)) >> 1
    
    whereas now via match.pd
    
      ((int) ((unsigned int) xx >> 31) + xx) >> 1
    
    which is basically the same.  We just have to adapt the scan-assembler
    directives w.r.t. signed/unsigned shifts which is done by this patch.
    
    gcc/testsuite/ChangeLog:
    
            * gcc.target/s390/vector/vcond-shift.c: Adapt to new match.pd
            rule and change scan-assembler-times for shifts.

Diff:
---
 gcc/testsuite/gcc.target/s390/vector/vcond-shift.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/gcc/testsuite/gcc.target/s390/vector/vcond-shift.c 
b/gcc/testsuite/gcc.target/s390/vector/vcond-shift.c
index a6b4e97aa502..b942f44039d2 100644
--- a/gcc/testsuite/gcc.target/s390/vector/vcond-shift.c
+++ b/gcc/testsuite/gcc.target/s390/vector/vcond-shift.c
@@ -3,13 +3,13 @@
 /* { dg-do compile { target { s390*-*-* } } } */
 /* { dg-options "-O3 -march=z13 -mzarch" } */
 
-/* { dg-final { scan-assembler-times "vesraf\t%v.?,%v.?,31" 6 } } */
-/* { dg-final { scan-assembler-times "vesrah\t%v.?,%v.?,15" 6 } } */
-/* { dg-final { scan-assembler-times "vesrab\t%v.?,%v.?,7" 6 } } */
+/* { dg-final { scan-assembler-times "vesraf\t%v.?,%v.?,31" 4 } } */
+/* { dg-final { scan-assembler-times "vesrah\t%v.?,%v.?,15" 4 } } */
+/* { dg-final { scan-assembler-times "vesrab\t%v.?,%v.?,7" 4 } } */
 /* { dg-final { scan-assembler-not "vzero\t*" } } */
-/* { dg-final { scan-assembler-times "vesrlf\t%v.?,%v.?,31" 4 } } */
-/* { dg-final { scan-assembler-times "vesrlh\t%v.?,%v.?,15" 4 } } */
-/* { dg-final { scan-assembler-times "vesrlb\t%v.?,%v.?,7" 4 } } */
+/* { dg-final { scan-assembler-times "vesrlf\t%v.?,%v.?,31" 6 } } */
+/* { dg-final { scan-assembler-times "vesrlh\t%v.?,%v.?,15" 6 } } */
+/* { dg-final { scan-assembler-times "vesrlb\t%v.?,%v.?,7" 6 } } */
 
 /* Make it expand to two vector operations.  */
 #define ITER(X) (2 * (16 / sizeof (X[1])))

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