The branch 'aoliva/heads/testme' was updated to point to:
942384524379... [ifcombine] avoid creating out-of-bounds BIT_FIELD_REFs [PR
It previously pointed to:
96292bfbef19... [ifcombine] check for more zero-extension cases [PR118572]
Diff:
!!! WARNING: THE FOLLOWING COMMITS ARE NO LONGER ACCESSIBLE (LOST):
-------------------------------------------------------------------
96292bf... [ifcombine] check for more zero-extension cases [PR118572]
a62d2ab... [ifcombine] avoid dropping tree_could_trap_p [PR118514]
5aae555... [ifcombine] improve reverse checking and operand swapping
Summary of changes (added commits):
-----------------------------------
9423845... [ifcombine] avoid creating out-of-bounds BIT_FIELD_REFs [PR
91fa9c1... [ifcombine] check for more zero-extension cases [PR118572] (*)
a56122d... [ifcombine] improve reverse checking and operand swapping (*)
3f05d70... [ifcombine] out-of-bounds bitfield refs can trap [PR118514] (*)
35d5c4f... Daily bump. (*)
6d8a0e8... c++: bogus error with nested lambdas [PR117602] (*)
4ce9e35... c++: Small make_tree_vector_from_ctor improvement (*)
ce28eb9... hppa: Fix typo in ADDITIONAL_REGISTER_NAMES in pa32-regs.h (*)
8f6dd18... vect: Avoid copying of uninitialized variable [PR118628] (*)
3cef53a... Fortran: do not evaluate arguments of MAXVAL/MINVAL too oft (*)
0bb3223... AVR: PR118012 - Try to work around sick code from match.pd. (*)
2d55c01... Optimize vector<bool>::operator[] (*)
3dbcf79... rtl-ssa: Avoid dangling phi uses [PR118562] (*)
1886dfb... aarch64: Avoid redundant writes to FPMR (*)
ce6fc67... aarch64: Fix memory cost for FPM_REGNUM (*)
97beccb... aarch64: Allow FPMR source values to be zero (*)
27a05f8... tree-assume: Fix UB in assume_query [PR118605] (*)
b8ac061... OpenMP/PolyInt: Pass poly-int structures by address to OMP (*)
314d20b... testsuite: i386: Adjust gcc.target/i386/cmov12.c for Sun as (*)
b02c061... c++: Fix build_omp_array_section for type dependent array_e (*)
dd14b08... c++: Fix weird expression in test for clauses other than wh (*)
d19b068... builtins: Store unspecified value to *exp for inf/nan [PR11 (*)
57b706d... testsuite: Only run test if alarm is available (*)
f30edd1... AVR: PR117726 - Tweak 32-bit logical shifts of 25...30 for (*)
b3f51ea... Fortran: Regression- fix ICE at fortran/trans-decl.c:1575 [ (*)
7fffff1... tree-optimization/118558 - fix alignment compute with VMAT_ (*)
2119c25... c++: Update mangling of lambdas in expressions (*)
685c458... c++: Fix mangling of lambdas in static data member initiali (*)
21cccfa... c++/modules: Fix exporting temploid friends in header units (*)
9ddf4a6... LoongArch: Fix invalid subregs in xorsign [PR118501] (*)
06b7873... i386: Omit "p" for packed in intrin name for FP8 convert (*)
f1f2813... i386: Change mnemonics from VCVT[,T]NEBF162I[,U]BS to VCVT[ (*)
f105646... i386: Change mnemonics from VCVTNEPH2[B,H]F8 to VCVTPH2[B,H (*)
cfef82b... i386: Change mnemonics from VCVTNE2PH2[B,H]F8 to VCVT2PH2[B (*)
a75896c... i386: Change mnemonics from VCOMSBF16 to VCOMISBF16 (*)
a3e1988... i386: Change mnemonics from V[GETEXP,FPCLASS]PBF16 to V[GET (*)
d4d5935... i386: Change mnemonics from V[RSQRT,SCALEF,SQRTNE]PBF16 to (*)
71a2737... i386: Change mnemonics from V[GETMANT,REDUCENE,RNDSCALENE]P (*)
5472f51... i386: Change mnemonics from VMINMAXNEPBF16 to VMINMAXBF16 (*)
7f59b88... i386: Change mnemonics from V[CMP,MAX,MIN]PBF16 to V[CMP,MA (*)
d584660... i386: Change mnemonics from VF[,N]M[ADD,SUB][132,213,231]NE (*)
b2667fc... i386: Change mnemonics from V[ADDNE,DIVNE,MULNE,RCP,SUBNE]P (*)
a19aca8... i386: Enhance AMX tests (*)
447a01c... i386: Append -march=x86-64-v3 to AVX10.2/512 VNNI testcases (*)
4d1befa... Daily bump. (*)
fbc94ff... d,ada/spec: only sub nostd{inc,lib} rather than nostd{inc,l (*)
6db9d4e... c++: Implement for static locals CWG 2867 - Order of initia (*)
cb82869... c++: further tweak to cxx_eval_outermost_constant_expr [PR1 (*)
27470f9... jit: fix startup on aarch64 (*)
9ece1c2... s390: Fix arch15 machine string for binutils (*)
6fbf0b5... aarch64: Fix aarch64_write_sysregdi predicate (*)
6f4592a... AVR: Add test cases for PR118591. (*)
e13e751... c++: Clear TARGET_EXPR_ELIDING_P when forced to use a copy (*)
8c93a8a... LoongArch: Fix wrong code with <optab>_alsl_reversesi_exten (*)
14fde91... c++: Improve cp_parser_objc_messsage_args compile time (*)
1c40275... c++: Introduce append_ctor_to_tree_vector (*)
303cc73... c++: 'this' capture clobbered during recursive inst [PR1167 (*)
e9bd9d4... Daily bump. (*)
3f641a8... Revert "[PATCH 1/2] RISC-V:Add intrinsic support for the CM (*)
d4a1a63... Revert "[PATCH 2/2] RISC-V:Add intrinsic cases for the CMOs (*)
dae2b62... match: Improve the `x ==/!= ~x` pattern [PR118483] (*)
0d25d45... c++: Don't call fold from cp_fold if one of the operands is (*)
16d7782... testsuite: Require int32plus for test case pr117546.c (*)
79186e3... libphobos: Add MIPS64 implementation of fiber_switchContext (*)
e324619... RISC-V: Unbreak bootstrap. (*)
55d7925... AVR: Tweak some 16-bit shifts by using MUL. (*)
1911b8c... c++: Handle CPP_EMBED in cp_parser_objc_message_args [PR118 (*)
3024b12... RISC-V: Add a new constraint to ensure that the vl of XThea (*)
ab24171... RISC-V: Enable and adjust the testsuite for XTheadVector. (*)
ef7ed22... Use `known_ge' instead of `compare_sizes_for_sort'. (*)
5ddcf04... testsuite: Add testcase for already fixed PR [PR118560] (*)
f3f0249... c++: fix wrong-code with constexpr prvalue opt [PR118396] (*)
da75309... vect: Force alignment peeling to vectorize more early break (*)
ddc6517... MAINTAINERS: add myself to write after approval (*)
61995d8... [RISC-V][PR target/116256] Fix incorrect return value for p (*)
1a3a5f5... Regenerate aarch64.opt.urls (*)
1d25e35... tree-optimization/118569 - LC SSA broken after unrolling (*)
eb0b551... AArch64: Add LUTI ACLE for SVE2 (*)
4e4c378... c++: Don't ICE in build_class_member_access_expr during err (*)
1dd79f4... middle-end: use ncopies both when registering and reading m (*)
9fd190c... aarch64: Drop ILP32 from default elf multilibs after deprec (*)
4d2a1c2... LoongArch: Implement target pragma. (*)
c01ad91... LoongArch: Implement target attribute. (*)
f3d884d... testsuite: Fix test failing with -fimplicit-constexpr [PR11 (*)
e579887... Add warning for non-spec compliant FMV in Aarch64 (*)
f31d49d... c++: Speed up compilation of large char array initializers (*)
2a68168... c, c++: Return 1 for __has_builtin(__builtin_va_arg) and __ (*)
843ca8a... c++: Handle RAW_DATA_CST in add_list_candidates [PR118532] (*)
d559fba... Daily bump. (*)
2fcb0c0... c++/modules: Check linkage of structured binding decls (*)
5c0e187... c++/modules: Handle mismatching TYPE_CANONICAL when dedupin (*)
07f62ed... [PR118560][LRA]: Fix typo in checking secondary memory mode (*)
1edd93f... [PR target/116256] Adjust expected output in a couple testc (*)
64a162d... [PR target/114442] Add reservations for all insn types to x (*)
59e5d08... [PR target/116256] Fix latent regression in pattern to asso (*)
5ad94b6... Update gcc zh_CN.po (*)
5cd4605... [PR117868][LRA]: Restrict the reuse of spill slots (*)
96f4ba4... Fortran: improve error message for conflicting OpenMP claus (*)
749dcd9... vect: Preserve OMP info for conditional stores [PR118348] (*)
09c8aa3... Revert "vect: Preserve OMP info for conditional stores [PR1 (*)
8edf8b5... vect: Preserve OMP info for conditional stores [PR118384] (*)
6612b8e... aarch64: Fix invalid subregs in xorsign [PR118501] (*)
1b88204... aarch64: Add missing simd requirements for INS [PR118531] (*)
9ab3895... d: Fix failing test with 32-bit compiler [PR114434] (*)
0d1e62b... Fortran: do not copy back for parameter actual arguments [P (*)
0b58219... c++: Handle RAW_DATA_CST in make_tree_vector_from_ctor [PR1 (*)
9d86929... RISC-V: Correct the mode that is causing the program to fai (*)
0fe35e9... inline: Purge the abnormal edges as needed in fold_marked_s (*)
b342614... libstdc++: perfectly forward std::ranges::clamp arguments (*)
7cc5730... arm, testsuite: fix fast-math-bb-slp-complex-mla-float.c dg (*)
cb35651... arm, testsuite: remove duplicate dg-add-options arm_v8_3a_c (*)
7b64f75... tree-optimization/117875 - missed SLP vectorization (*)
10e9863... LoongArch: Improve reassociation for bitwise operation and (*)
f3bedc9... LoongArch: Simplify using bstr{ins,pick} instructions for a (*)
67b10ee... testsuite: Fix name of PR116348 test case (*)
1265afa... tree-optimization/118552 - failed LC SSA update after unrol (*)
6c59379... nvptx: Gracefully handle '-mptx=3.1' if neither sm_30 nor s (*)
d9d0eee... tree, c++: Consider TARGET_EXPR invariant like SAVE_EXPR [P (*)
d882e48... tree-ssa-dce: Fix calloc handling [PR118224] (*)
459816e... s390: Update vec_(load,store)_len(,_r) (*)
10c52b3... s390: Vector shift: Add 128-bit integer support (*)
ec22601... s390: arch15: Vector maximum/minimum: Add 128-bit integer s (*)
4cf5e26... s390: arch15: Vector load positive: Add 128-bit integer sup (*)
2e87d6e... s390: arch15: Vector compare: Add 128-bit integer support (*)
f31ddaa... s390: arch15: Vector devide/remainder (*)
0f0b91e... s390: arch15: Count leading/trailing zeros (*)
41a6991... s390: arch15: Vector generate element masks (*)
7fb7b36... s390: arch15: Vector eval (*)
adeb6ec... s390: arch15: Vector blend (*)
d71e20b... s390: arch15: Bit deposit and extract (*)
86a1acf... s390: arch15: Load indexed address (*)
447b917... s390: arch15: New instruction variants supporting 128-bit i (*)
b963174... s390: arch15: Prepare for future builtins (*)
13efa59... s390: Bump __VEC__ and add 128-bit integer zvector types (*)
a8192b5... s390: arch15: Prepare for a future architecture (*)
2638aea... s390: Sort definitions in vecintrin.h (*)
0c6fdb9... s390: Stay scalar for TOINTVEC/tointvec (*)
43a6001... RISC-V: Add sifive_vector.h (*)
af4fb24... i386: Fix wrong insn generated by shld/shrd ndd split [PR11 (*)
a7185d9... Daily bump. (*)
9d4b1e3... i386: Reorder *movdi_internal ISA attribute by ascending al (*)
7026436... i386/testsuite: Fix gcc.target/i386/pr118067*.c tests (*)
90dc847... Regenerate sparc.opt.urls (*)
34c5148... testsuite: Fixes for test case pr117546.c (*)
f7e0ac1... doc: Move modula2.org link to https (*)
1cc063e... doc: Adjust link to OpenMP specifications (*)
0ad1905... Daily bump. (*)
2ead012... d: Merge upstream dmd, druntime d115713410, phobos 1b242048 (*)
20a4306... c++: Copy over further 2 flags for !TREE_PUBLIC in copy_lin (*)
deb3a4a... [RISC-V][PR target/116308] Fix generation of initial RTL fo (*)
557d1a4... Fix uniqueness of symtab_node::get_dump_name. (*)
d309844... Fix bootstrap failure on SPARC with -O3 -mcpu=niagara4 (*)
729591f... RISC-V: Disable RV64-only crc testcases for RV32 (*)
b9493e9... [PR target/118357] RISC-V: Disable fusing vsetvl instructio (*)
c81543b... tree-optimization/118529 - ICE with condition vectorization (*)
0b2f2c6... AVR: Fix a plenk in doc/invoke.texi. (*)
aa36161... AArch64: Use standard names for saturating arithmetic (*)
8f8ca83... AArch64: Use standard names for SVE saturating arithmetic (*)
1775a72... Revert "AArch64: Use standard names for saturating arithmet (*)
8787f63... Revert "AArch64: Use standard names for SVE saturating arit (*)
413985b... c++: Fix up find_array_ctor_elt RAW_DATA_CST handling [PR11 (*)
3c34cea... RISC-V: Remove unused variable in riscv_file_end function. (*)
ce36692... LoongArch: Fix cost model for alsl (*)
cc6176a... LoongArch: Add alsl.wu (*)
43a15ce... Daily bump. (*)
ca2681d... libfortran: G formatting for UNSIGNED [PR118536] (*)
9f009e8... [PR118067][LRA]: Check secondary memory mode for the reg cl (*)
d8a31b5... testsuite: Make embed-10.c test more robust (*)
975c4f1... d: Add testcase for fixed PR117115 (*)
71280df... s390: Replace some checking assertions with output_operand_ (*)
26b2d9f... AArch64: Use standard names for SVE saturating arithmetic (*)
5f5833a... AArch64: Use standard names for saturating arithmetic (*)
7a47e48... rs6000, Remove redundant built-in __builtin_vsx_xvcvuxwdp (*)
38e862a... rs6000, remove built-ins __builtin_vsx_vperm_8hi and __buil (*)
bc57533... rs6000, add testcases to the overloaded vec_perm built-in (*)
5d77976... rs6000, fix test builtins-1-p10-runnable.c (*)
6a9086b... AVR: Add "const" attribute to avr built-in functions if pos (*)
f054c36... c++/modules: Propagate FNDECL_USED_AUTO when propagating de (*)
5e91be6... OpenMP/C++: Fix declare_variant's 'adjust_args' if there is (*)
f3ccc57... c++: Allow pragmas in NSDMIs [PR118147] (*)
3347ac3... testsuite/117958 - ifcombine differences on aarch64 vs rest (*)
6580b89... AVR: Use INT_N to built-in define __int24. (*)
3ab9eb6... match.pd: Fix (FTYPE) N CMP (FTYPE) M optimization for GENE (*)
b5a0692... c++: Friend classes don't shadow enclosing template class p (*)
44d2155... tree-optimization/92539 - missed optimization leads to bogu (*)
c6f9f53... OpenMP: Fix metadirective test failures on x86_64 with -m32 (*)
59a869d... RISC-V: Add -fcf-protection=[full|branch|return] to enable (*)
2b3efe7... RISC-V: Add .note.gnu.property for ZICFILP and ZICFISS ISA (*)
805a052... RISC-V: Add Zicfilp ISA extension. (*)
dc76aa0... RISC-V: Add Zicfiss ISA extension. (*)
29da6a6... Daily bump. (*)
d740694... d: Fix record layout of compiler-generated TypeInfo_Class [ (*)
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