https://gcc.gnu.org/g:6580b89957ccabbb5aaf43736b36b9bd399fbc13
commit r15-6993-g6580b89957ccabbb5aaf43736b36b9bd399fbc13
Author: Georg-Johann Lay <a...@gjlay.de>
Date: Thu Jan 16 19:43:27 2025 +0100
AVR: Use INT_N to built-in define __int24.
This patch uses the INT_N interface to define __int24 in avr-modes.def.
Since the testsuite uses -Wpedantic and __int24 is a C/C++ extension,
uses of __int24 and __uint24 is now marked as __extension__.
PR target/118329
gcc/
* config/avr/avr-modes.def: Add INT_N (PSI, 24).
* config/avr/avr.cc (avr_init_builtin_int24)
<__int24>: Remove definition.
<__uint24>: Adjust definition to INT_N interface.
gcc/testsuite/
* gcc.target/avr/pr115830-add.c (__int24, __uint24): Add
__extension__
to respective typedefs.
* gcc.target/avr/pr115830-sub-ext.c: Same.
* gcc.target/avr/pr115830-sub.c: Same.
* gcc.target/avr/torture/get-mem.c: Same.
* gcc.target/avr/torture/set-mem.c: Same.
* gcc.target/avr/torture/ifelse-c.h: Same.
* gcc.target/avr/torture/ifelse-d.h: Same.
* gcc.target/avr/torture/ifelse-q.h: Same.
* gcc.target/avr/torture/ifelse-r.h: Same.
* gcc.target/avr/torture/int24-mul.c: Same.
* gcc.target/avr/torture/pr109907-2.c: Same.
* gcc.target/avr/torture/pr61443.c: Same.
* gcc.target/avr/torture/pr63633-ice-mult.c: Same.
* gcc.target/avr/torture/shift-l-u24.c: Same.
* gcc.target/avr/torture/shift-r-i24.c: Same.
* gcc.target/avr/torture/shift-r-u24.c: Same.
* gcc.target/avr/torture/add-extend.c: Same.
* gcc.target/avr/torture/sub-extend.c: Same.
* gcc.target/avr/torture/sub-zerox.c: Same.
* gcc.target/avr/torture/test-gprs.h: Same.
Diff:
---
gcc/config/avr/avr-modes.def | 1 +
gcc/config/avr/avr.cc | 12 +++++++-----
gcc/testsuite/gcc.target/avr/pr115830-add.c | 4 ++--
gcc/testsuite/gcc.target/avr/pr115830-sub-ext.c | 4 ++--
gcc/testsuite/gcc.target/avr/pr115830-sub.c | 4 ++--
gcc/testsuite/gcc.target/avr/torture/add-extend.c | 4 ++--
gcc/testsuite/gcc.target/avr/torture/get-mem.c | 2 +-
gcc/testsuite/gcc.target/avr/torture/ifelse-c.h | 4 ++--
gcc/testsuite/gcc.target/avr/torture/ifelse-d.h | 4 ++--
gcc/testsuite/gcc.target/avr/torture/ifelse-q.h | 4 ++--
gcc/testsuite/gcc.target/avr/torture/ifelse-r.h | 4 ++--
gcc/testsuite/gcc.target/avr/torture/int24-mul.c | 9 ++++++---
gcc/testsuite/gcc.target/avr/torture/pr109907-2.c | 2 +-
gcc/testsuite/gcc.target/avr/torture/pr61443.c | 14 ++++++++------
gcc/testsuite/gcc.target/avr/torture/pr63633-ice-mult.c | 12 +++++++-----
gcc/testsuite/gcc.target/avr/torture/set-mem.c | 2 +-
gcc/testsuite/gcc.target/avr/torture/shift-l-u24.c | 2 +-
gcc/testsuite/gcc.target/avr/torture/shift-r-i24.c | 2 +-
gcc/testsuite/gcc.target/avr/torture/shift-r-u24.c | 2 +-
gcc/testsuite/gcc.target/avr/torture/sub-extend.c | 4 ++--
gcc/testsuite/gcc.target/avr/torture/sub-zerox.c | 2 +-
gcc/testsuite/gcc.target/avr/torture/test-gprs.h | 2 +-
22 files changed, 55 insertions(+), 45 deletions(-)
diff --git a/gcc/config/avr/avr-modes.def b/gcc/config/avr/avr-modes.def
index c71138c8d326..95d3814a8129 100644
--- a/gcc/config/avr/avr-modes.def
+++ b/gcc/config/avr/avr-modes.def
@@ -18,6 +18,7 @@
<http://www.gnu.org/licenses/>. */
FRACTIONAL_INT_MODE (PSI, 24, 3);
+INT_N (PSI, 24);
/* Used when the N (and Z) flag(s) of SREG are set.
The N flag indicates whether the value is negative.
diff --git a/gcc/config/avr/avr.cc b/gcc/config/avr/avr.cc
index 41899289c3f1..c44ed7424538 100644
--- a/gcc/config/avr/avr.cc
+++ b/gcc/config/avr/avr.cc
@@ -15336,11 +15336,13 @@ avr_builtin_decl (unsigned id, bool /*initialize_p*/)
static void
avr_init_builtin_int24 (void)
{
- tree int24_type = make_signed_type (GET_MODE_BITSIZE (PSImode));
- tree uint24_type = make_unsigned_type (GET_MODE_BITSIZE (PSImode));
-
- lang_hooks.types.register_builtin_type (int24_type, "__int24");
- lang_hooks.types.register_builtin_type (uint24_type, "__uint24");
+ for (int i = 0; i < NUM_INT_N_ENTS; ++i)
+ if (int_n_data[i].bitsize == 24)
+ {
+ tree uint24_type = int_n_trees[i].unsigned_type;
+ lang_hooks.types.register_builtin_type (uint24_type, "__uint24");
+ break;
+ }
}
diff --git a/gcc/testsuite/gcc.target/avr/pr115830-add.c
b/gcc/testsuite/gcc.target/avr/pr115830-add.c
index 99ac89cd0a60..89ce4847141c 100644
--- a/gcc/testsuite/gcc.target/avr/pr115830-add.c
+++ b/gcc/testsuite/gcc.target/avr/pr115830-add.c
@@ -5,8 +5,8 @@ typedef __UINT8_TYPE__ u8;
typedef __INT8_TYPE__ i8;
typedef __UINT16_TYPE__ u16;
typedef __INT16_TYPE__ i16;
-typedef __uint24 u24;
-typedef __int24 i24;
+__extension__ typedef __uint24 u24;
+__extension__ typedef __int24 i24;
typedef __UINT32_TYPE__ u32;
typedef __INT32_TYPE__ i32;
diff --git a/gcc/testsuite/gcc.target/avr/pr115830-sub-ext.c
b/gcc/testsuite/gcc.target/avr/pr115830-sub-ext.c
index 3fac6ddd0df9..3f959ab2cb96 100644
--- a/gcc/testsuite/gcc.target/avr/pr115830-sub-ext.c
+++ b/gcc/testsuite/gcc.target/avr/pr115830-sub-ext.c
@@ -5,8 +5,8 @@ typedef __UINT8_TYPE__ u8;
typedef __INT8_TYPE__ i8;
typedef __UINT16_TYPE__ u16;
typedef __INT16_TYPE__ i16;
-typedef __uint24 u24;
-typedef __int24 i24;
+__extension__ typedef __uint24 u24;
+__extension__ typedef __int24 i24;
typedef __UINT32_TYPE__ u32;
typedef __INT32_TYPE__ i32;
diff --git a/gcc/testsuite/gcc.target/avr/pr115830-sub.c
b/gcc/testsuite/gcc.target/avr/pr115830-sub.c
index ef24e74752d1..5ad5e8918a19 100644
--- a/gcc/testsuite/gcc.target/avr/pr115830-sub.c
+++ b/gcc/testsuite/gcc.target/avr/pr115830-sub.c
@@ -5,8 +5,8 @@ typedef __UINT8_TYPE__ u8;
typedef __INT8_TYPE__ i8;
typedef __UINT16_TYPE__ u16;
typedef __INT16_TYPE__ i16;
-typedef __uint24 u24;
-typedef __int24 i24;
+__extension__ typedef __uint24 u24;
+__extension__ typedef __int24 i24;
typedef __UINT32_TYPE__ u32;
typedef __INT32_TYPE__ i32;
diff --git a/gcc/testsuite/gcc.target/avr/torture/add-extend.c
b/gcc/testsuite/gcc.target/avr/torture/add-extend.c
index 320f510e677f..d87077a218be 100644
--- a/gcc/testsuite/gcc.target/avr/torture/add-extend.c
+++ b/gcc/testsuite/gcc.target/avr/torture/add-extend.c
@@ -2,12 +2,12 @@
typedef __UINT8_TYPE__ u8;
typedef __UINT16_TYPE__ u16;
-typedef __uint24 u24;
+__extension__ typedef __uint24 u24;
typedef __UINT32_TYPE__ u32;
typedef __INT8_TYPE__ s8;
typedef __INT16_TYPE__ s16;
-typedef __int24 s24;
+__extension__ typedef __int24 s24;
typedef __INT32_TYPE__ s32;
#define NI __attribute__((noipa))
diff --git a/gcc/testsuite/gcc.target/avr/torture/get-mem.c
b/gcc/testsuite/gcc.target/avr/torture/get-mem.c
index 38425fe638f3..921d4ad26803 100644
--- a/gcc/testsuite/gcc.target/avr/torture/get-mem.c
+++ b/gcc/testsuite/gcc.target/avr/torture/get-mem.c
@@ -4,7 +4,7 @@
typedef __INT8_TYPE__ s8;
typedef __INT16_TYPE__ s16;
-typedef __int24 s24;
+__extension__ typedef __int24 s24;
typedef __INT32_TYPE__ s32;
static const s8 arr8[] = { 12, 23, 34 };
diff --git a/gcc/testsuite/gcc.target/avr/torture/ifelse-c.h
b/gcc/testsuite/gcc.target/avr/torture/ifelse-c.h
index e742415d7fd4..127015527760 100644
--- a/gcc/testsuite/gcc.target/avr/torture/ifelse-c.h
+++ b/gcc/testsuite/gcc.target/avr/torture/ifelse-c.h
@@ -5,12 +5,12 @@
#ifdef __OPTIMIZE__
typedef __UINT32_TYPE__ u32;
-typedef __uint24 u24;
+__extension__ typedef __uint24 u24;
typedef __UINT16_TYPE__ u16;
typedef __UINT8_TYPE__ u8;
typedef __INT32_TYPE__ i32;
-typedef __int24 i24;
+__extension__ typedef __int24 i24;
typedef __INT16_TYPE__ i16;
typedef __INT8_TYPE__ i8;
diff --git a/gcc/testsuite/gcc.target/avr/torture/ifelse-d.h
b/gcc/testsuite/gcc.target/avr/torture/ifelse-d.h
index 3ff2494ea6a2..82e3e21d331d 100644
--- a/gcc/testsuite/gcc.target/avr/torture/ifelse-d.h
+++ b/gcc/testsuite/gcc.target/avr/torture/ifelse-d.h
@@ -6,12 +6,12 @@
#ifdef __OPTIMIZE__
typedef __UINT32_TYPE__ u32;
-typedef __uint24 u24;
+__extension__ typedef __uint24 u24;
typedef __UINT16_TYPE__ u16;
typedef __UINT8_TYPE__ u8;
typedef __INT32_TYPE__ i32;
-typedef __int24 i24;
+__extension__ typedef __int24 i24;
typedef __INT16_TYPE__ i16;
typedef __INT8_TYPE__ i8;
diff --git a/gcc/testsuite/gcc.target/avr/torture/ifelse-q.h
b/gcc/testsuite/gcc.target/avr/torture/ifelse-q.h
index 6dbb05990e06..0b7c80e408f6 100644
--- a/gcc/testsuite/gcc.target/avr/torture/ifelse-q.h
+++ b/gcc/testsuite/gcc.target/avr/torture/ifelse-q.h
@@ -6,12 +6,12 @@
#ifdef __OPTIMIZE__
typedef __UINT32_TYPE__ u32;
-typedef __uint24 u24;
+__extension__ typedef __uint24 u24;
typedef __UINT16_TYPE__ u16;
typedef __UINT8_TYPE__ u8;
typedef __INT32_TYPE__ i32;
-typedef __int24 i24;
+__extension__ typedef __int24 i24;
typedef __INT16_TYPE__ i16;
typedef __INT8_TYPE__ i8;
diff --git a/gcc/testsuite/gcc.target/avr/torture/ifelse-r.h
b/gcc/testsuite/gcc.target/avr/torture/ifelse-r.h
index 19cd1cc67c43..588ad3a83b1f 100644
--- a/gcc/testsuite/gcc.target/avr/torture/ifelse-r.h
+++ b/gcc/testsuite/gcc.target/avr/torture/ifelse-r.h
@@ -5,12 +5,12 @@
#ifdef __OPTIMIZE__
typedef __UINT32_TYPE__ u32;
-typedef __uint24 u24;
+__extension__ typedef __uint24 u24;
typedef __UINT16_TYPE__ u16;
typedef __UINT8_TYPE__ u8;
typedef __INT32_TYPE__ i32;
-typedef __int24 i24;
+__extension__ typedef __int24 i24;
typedef __INT16_TYPE__ i16;
typedef __INT8_TYPE__ i8;
diff --git a/gcc/testsuite/gcc.target/avr/torture/int24-mul.c
b/gcc/testsuite/gcc.target/avr/torture/int24-mul.c
index 9b29763738cc..98df1d0d3c30 100644
--- a/gcc/testsuite/gcc.target/avr/torture/int24-mul.c
+++ b/gcc/testsuite/gcc.target/avr/torture/int24-mul.c
@@ -7,7 +7,10 @@
#define __flash /* empty */
#endif
-const __flash __int24 vals[] =
+__extension__ typedef __uint24 uint24_t;
+__extension__ typedef __int24 int24_t;
+
+const __flash int24_t vals[] =
{
0, 1, 2, 3, -1, -2, -3, 0xff, 0x100, 0x101,
0xffL * 0xff, 0xfffL * 0xfff, 0x101010L, 0xaaaaaaL
@@ -17,7 +20,7 @@ void test_u (void)
{
unsigned int i;
unsigned long la, lb, lc;
- __uint24 a, b, c;
+ uint24_t a, b, c;
int S = sizeof (vals) / sizeof (*vals);
@@ -58,7 +61,7 @@ void test_nu (void)
unsigned long la;
unsigned int i;
int S = sizeof (vals) / sizeof (*vals);
- __uint24 a;
+ uint24_t a;
for (i = 0; i < 500; i++)
{
diff --git a/gcc/testsuite/gcc.target/avr/torture/pr109907-2.c
b/gcc/testsuite/gcc.target/avr/torture/pr109907-2.c
index 813a0e083fa4..c867a2d0fc67 100644
--- a/gcc/testsuite/gcc.target/avr/torture/pr109907-2.c
+++ b/gcc/testsuite/gcc.target/avr/torture/pr109907-2.c
@@ -5,7 +5,7 @@
typedef __UINT8_TYPE__ uint8_t;
typedef __UINT16_TYPE__ uint16_t;
-typedef __uint24 uint24_t;
+__extension__ typedef __uint24 uint24_t;
typedef __UINT32_TYPE__ uint32_t;
typedef __INT32_TYPE__ int32_t;
diff --git a/gcc/testsuite/gcc.target/avr/torture/pr61443.c
b/gcc/testsuite/gcc.target/avr/torture/pr61443.c
index 2e2557b1c130..f70b9e5d88d8 100644
--- a/gcc/testsuite/gcc.target/avr/torture/pr61443.c
+++ b/gcc/testsuite/gcc.target/avr/torture/pr61443.c
@@ -9,6 +9,8 @@
#define __memx /* empty */
#endif
+__extension__ typedef __int24 int24_t;
+
#define NC __attribute__((noipa))
void NC vfun (char n, ...)
@@ -30,7 +32,7 @@ void NC vfun (char n, ...)
abort();
break;
case 3:
- if (333333 != va_arg (ap, __int24))
+ if (333333 != va_arg (ap, int24_t))
abort();
break;
case 4:
@@ -67,12 +69,12 @@ void NC boox_hi (const __memx int *p)
vfun (2, *p);
}
-void NC boo_psi (const __flash __int24 *p)
+void NC boo_psi (const __flash int24_t *p)
{
vfun (3, *p);
}
-void NC boox_psi (const __memx __int24 *p)
+void NC boox_psi (const __memx int24_t *p)
{
vfun (3, *p);
}
@@ -99,19 +101,19 @@ void NC boox_di (const __memx long long *p)
const __flash char f_qi = 11;
const __flash int f_hi = 2222;
-const __flash __int24 f_psi = 333333;
+const __flash int24_t f_psi = 333333;
const __flash long f_si = 44444444;
const __flash long long f_di = 8888888888888888;
const __memx char x_qi = 11;
const __memx int x_hi = 2222;
-const __memx __int24 x_psi = 333333;
+const __memx int24_t x_psi = 333333;
const __memx long x_si = 44444444;
const __memx long long x_di = 8888888888888888;
char r_qi = 11;
int r_hi = 2222;
-__int24 r_psi = 333333;
+int24_t r_psi = 333333;
long r_si = 44444444;
long long r_di = 8888888888888888;
diff --git a/gcc/testsuite/gcc.target/avr/torture/pr63633-ice-mult.c
b/gcc/testsuite/gcc.target/avr/torture/pr63633-ice-mult.c
index a523424c3253..5568ed689f5d 100644
--- a/gcc/testsuite/gcc.target/avr/torture/pr63633-ice-mult.c
+++ b/gcc/testsuite/gcc.target/avr/torture/pr63633-ice-mult.c
@@ -6,21 +6,23 @@ void ice_mult32 (int x)
__asm volatile (" " :: "r" (reg = 0x12345 * x));
}
+__extension__ typedef __int24 i24;
+
void ice_mult24 (int x)
{
- register __int24 reg __asm ("20");
+ register i24 reg __asm ("20");
__asm volatile (" " :: "r" (reg = 0x12345 * x));
}
-void ice_sh24 (__int24 x)
+void ice_sh24 (i24 x)
{
- register __int24 reg __asm ("20");
+ register i24 reg __asm ("20");
__asm volatile (" " :: "r" (reg = x << 3));
}
-void ice_sh24b (__int24 x)
+void ice_sh24b (i24 x)
{
- register __int24 reg __asm ("20");
+ register i24 reg __asm ("20");
__asm volatile (" " :: "r" (reg = x << 22));
}
diff --git a/gcc/testsuite/gcc.target/avr/torture/set-mem.c
b/gcc/testsuite/gcc.target/avr/torture/set-mem.c
index ca0a29c44eb2..ec809f8be66a 100644
--- a/gcc/testsuite/gcc.target/avr/torture/set-mem.c
+++ b/gcc/testsuite/gcc.target/avr/torture/set-mem.c
@@ -4,7 +4,7 @@
typedef __INT8_TYPE__ s8;
typedef __INT16_TYPE__ s16;
-typedef __int24 s24;
+__extension__ typedef __int24 s24;
typedef __INT32_TYPE__ s32;
static s8 arr8[3];
diff --git a/gcc/testsuite/gcc.target/avr/torture/shift-l-u24.c
b/gcc/testsuite/gcc.target/avr/torture/shift-l-u24.c
index 4fd66f3f621b..859be0941af7 100644
--- a/gcc/testsuite/gcc.target/avr/torture/shift-l-u24.c
+++ b/gcc/testsuite/gcc.target/avr/torture/shift-l-u24.c
@@ -3,7 +3,7 @@
#define OP <<
#define BITS 24
-typedef __uint24 T;
+__extension__ typedef __uint24 T;
#include "test-shift.h"
diff --git a/gcc/testsuite/gcc.target/avr/torture/shift-r-i24.c
b/gcc/testsuite/gcc.target/avr/torture/shift-r-i24.c
index 45e1b0bab883..1d92c14730e3 100644
--- a/gcc/testsuite/gcc.target/avr/torture/shift-r-i24.c
+++ b/gcc/testsuite/gcc.target/avr/torture/shift-r-i24.c
@@ -3,7 +3,7 @@
#define OP >>
#define BITS 24
-typedef __int24 T;
+__extension__ typedef __int24 T;
#include "test-shift.h"
diff --git a/gcc/testsuite/gcc.target/avr/torture/shift-r-u24.c
b/gcc/testsuite/gcc.target/avr/torture/shift-r-u24.c
index 6acdd4e2672d..628ea77ade10 100644
--- a/gcc/testsuite/gcc.target/avr/torture/shift-r-u24.c
+++ b/gcc/testsuite/gcc.target/avr/torture/shift-r-u24.c
@@ -3,7 +3,7 @@
#define OP >>
#define BITS 24
-typedef __uint24 T;
+__extension__ typedef __uint24 T;
#include "test-shift.h"
diff --git a/gcc/testsuite/gcc.target/avr/torture/sub-extend.c
b/gcc/testsuite/gcc.target/avr/torture/sub-extend.c
index ebc403fa4793..94ffef3b1f21 100644
--- a/gcc/testsuite/gcc.target/avr/torture/sub-extend.c
+++ b/gcc/testsuite/gcc.target/avr/torture/sub-extend.c
@@ -2,12 +2,12 @@
typedef __UINT8_TYPE__ u8;
typedef __UINT16_TYPE__ u16;
-typedef __uint24 u24;
+__extension__ typedef __uint24 u24;
typedef __UINT32_TYPE__ u32;
typedef __INT8_TYPE__ s8;
typedef __INT16_TYPE__ s16;
-typedef __int24 s24;
+__extension__ typedef __int24 s24;
typedef __INT32_TYPE__ s32;
#define NI __attribute__((noipa))
diff --git a/gcc/testsuite/gcc.target/avr/torture/sub-zerox.c
b/gcc/testsuite/gcc.target/avr/torture/sub-zerox.c
index 435fc7065f0f..8152533d569c 100644
--- a/gcc/testsuite/gcc.target/avr/torture/sub-zerox.c
+++ b/gcc/testsuite/gcc.target/avr/torture/sub-zerox.c
@@ -2,7 +2,7 @@
typedef __UINT8_TYPE__ u8;
typedef __UINT16_TYPE__ u16;
-typedef __uint24 u24;
+__extension__ typedef __uint24 u24;
typedef __UINT32_TYPE__ u32;
u32 sub_32_8 (u32 a, u8 b) { return a - b; }
diff --git a/gcc/testsuite/gcc.target/avr/torture/test-gprs.h
b/gcc/testsuite/gcc.target/avr/torture/test-gprs.h
index a982115e02a7..56f358f7c250 100644
--- a/gcc/testsuite/gcc.target/avr/torture/test-gprs.h
+++ b/gcc/testsuite/gcc.target/avr/torture/test-gprs.h
@@ -1,6 +1,6 @@
typedef __UINT8_TYPE__ u8;
typedef __UINT16_TYPE__ u16;
-typedef __uint24 u24;
+__extension__ typedef __uint24 u24;
typedef __UINT32_TYPE__ u32;
typedef __UINT64_TYPE__ u64;
