The branch 'redhat/heads/gcc-15-branch' was updated to point to:

 d2b3fd44a4b2... Merge commit 'r15-5896-g4114b7fb1cb4cb90b9fafc22213d7d9579b

It previously pointed to:

 ec0e37c5cf7e... Red Hat customizations.

Diff:

Summary of changes (added commits):
-----------------------------------

  d2b3fd4... Merge commit 'r15-5896-g4114b7fb1cb4cb90b9fafc22213d7d9579b
  4114b7f... AVR: ad target/117726 - Also split logic shifts of bitsize  (*)
  f3b5de9... preprocessor: Adjust C rules on UCNs for C23 [PR117162] (*)
  af9a3fe... tree-optimization/117874 - optimize SLP discovery budget us (*)
  d4f3c3e... Use the number of relevant stmts to limit SLP build (*)
  d203f4c... AVR: Tweak uin8_t << 6 and uint8_t >> 6 shifts. (*)
  d777d66... aarch64: Fix fp8 cpuinfo feature names (*)
  d1318eb... libstdc++: Make std::vector<bool> constructor noexcept (LWG (*)
  29bea69... libstdc++: Fix constraints on std::optional converting cons (*)
  17c9c7c... tree-ssanames, match.pd: get_nonzero_bits/with_*_nonzero_bi (*)
  0b89341... bitintlower: Fix up ?ROTATE_EXPR lowering [PR117847] (*)
  3d72e50... OpenMP: 'allocate' directive - fixes for 'alignof' and [[om (*)
  83f22c1... aarch64: Add flags field to aarch64-simd-pragma-builtins.de (*)
  a07a2b8... aarch64: Add support for AdvSIMD lut (*)
  f855bc3... aarch64: Refactor AdvSIMD intrinsics (*)
  c063f83... aarch64: Put iterators into the right section (*)
  5f3282f... aarch64: Split out aarch64_v64_mode (*)
  e8fc954... aarch64: Move some diagnostic functions to aarch64.cc (*)
  f2d9116... Match: Refactor the unsigned SAT_SUB match patterns [NFC] (*)
  5cbeecf... RISC-V: Fix incorrect optimization options passing to reduc (*)
  4acab37... replace atoi with strtoul in varasm.cc (decode_reg_name_and (*)
  be8d1a3... tree-optimization/117874 - missed vectorization that's form (*)
  dfb9f6e... RISC-V: Fix incorrect optimization options passing to cond  (*)
  6f72fd5... Daily bump. (*)
  e11c795... libgdiagnostics: fix a missing rename in the docs (*)
  8173d0a... gccrs: Remove unused files 'gcc/rust/typecheck/rust-hir-typ (*)
  1467409... libstdc++: Simplify std::_Destroy using 'if constexpr' (*)
  4df8e6f... [committed] Add sym-exec subdirectory to configure.in rathe (*)
  4c857e9... MAINTAINERS: add myself to write after approval (*)
  27e5d86... libstdc++: Disable deprecated warnings for std::rel_ops in  (*)
  73e7f63... c++: some further concepts cleanups (*)
  cec9754... m68k: don't allow o/o in movdi, movdf, movxf (*)
  a3e5fbc... Add trailing newlines where needed (*)
  cde7ce0... arm, mve: Adding missing Runtime Library Exception to heade (*)
  5ab3f09... tree-optimization/116352 - SLP scheduling and stmt order (*)
  e36eae1... testsuite: Adjust rs6000-ldouble-2.c for switch to -std=gnu (*)
  2751970... RISC-V: Add intrinsics testcases for SiFive Xsfvfnrclipxfqf (*)
  1352d4d... RISC-V: Add intrinsics support for SiFive Xsfvfnrclipxfqf e (*)
  712cb29... riscv: Avoid narrowing warning (*)
  e4dd007... x86: Correct comments for pass_apx_nf_convert (*)
  12e30d8... RISC-V: Fix incorrect optimization options passing to widde (*)
  aedb306... RISC-V: Fix RVV strided load/store testcases failure (*)
  326d474... Daily bump. (*)
  90becd9... [contrib] validate_failures.py: fix python 3.12 escape sequ (*)
  721a38a... [PATCH] gcc: configure: Fix the optimization flags cleanup (*)
  999aad4... Thanks for the feedback on the first version of the patch.  (*)
  113e902... [PATCH v7 12/12] Add tests for CRC detection and generation (*)
  4d2b920... [PATCH v7 11/12] Replace the original CRC loops with a fast (*)
  dcc6101... [PATCH v7 10/12] Verify detected CRC loop with symbolic exe (*)
  148e204... [PATCH v6 09/12] Add symbolic execution support. (*)
  062ad20... [PATCH v7 08/12] Add a new pass for naive CRC loops detecti (*)
  75fe4e2... Write binary annotations for CodeView S_INLINESITE symbols (*)
  7151aa1... testsuite: Silence gcc.dg/pr117806.c for default_packed (*)
  e1009b3... VN: Don't recurse on for the same value of `a != 0` [PR1178 (*)
  24949e6... gimple-lim: Reuse boolean var when moving PHI (*)
  e0ffe66... testsuite: Fix aarch64/sve/acle/general-c/gnu_vectors_[12]. (*)
  8491723... testsuite: Fix aarch64/sve/acle/general-c++/gnu_vectors_[12 (*)
  b996304... testsuite: Fix sve-sizeless-[12].C for C++98 (*)
  86b0750... testsuite: Fix sve-sizeless-[12].C for aggregate change (*)
  99d1fcf... testsuite: Fix another issue with sve-sizeless-[12].C (*)
  cdcc938... testsuite: Fix part of sve-sizeless-2.c (*)
  e4c1b3d... [PATCH v3] zero_extend(not) -> xor optimization [PR112398] (*)
  ff5e235... Daily bump. (*)
  abed480... libstdc++: Improve new testcase for std::optional assignmen (*)
  c2c7d71... libstdc++: Fix constraints on std::optional converting assi (*)
  91f4550... libstdc++: Move std::monostate to <utility> for C++26 (P047 (*)
  0598e2f... libstdc++: Improve test for <utility> synopsis (*)
  2ae0566... Support for 64-bit location_t: Internal parts (*)
  8cc9d27... Support for 64-bit location_t: toplev parts (*)
  9bba906... Support for 64-bit location_t: Backend parts (*)
  abea0db... gimplify: Handle void expression as asm input [PR100501, PR (*)
  5297795... Write S_INLINESITE CodeView symbols (*)
  65b5c4a... Write S_INLINEELINES CodeView subsection (*)
  e908efb... Don't output CodeView line numbers for inlined functions (*)
  4ed1898... Add block parameter to begin_block debug hook (*)
  214985f... AVR: ad target/84211 - Split MOVW into MOVs in try_split_an (*)

(*) This commit already exists in another branch.
    Because the reference `refs/vendors/redhat/heads/gcc-15-branch' matches
    your hooks.email-new-commits-only configuration,
    no separate email is sent for this commit.

Reply via email to